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author | Davidlohr Bueso <dave@stgolabs.net> | 2024-11-13 21:33:21 +0300 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-12-11 18:09:55 +0300 |
commit | 9d0593da9459176396c1f2246efafbc80a828c7f (patch) | |
tree | 902c3cf8c60c3d1336601736788945a2aa8366ad | |
parent | 0207244ea0e7fcf45e68e24b0fffe964624a22ef (diff) | |
download | linux-9d0593da9459176396c1f2246efafbc80a828c7f.tar.xz |
riscv/futex: Optimize atomic cmpxchg
Remove redundant release/acquire barriers, optimizing the lr/sc sequence
to provide conditional RCsc synchronization, per the RVWMO.
Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20241113183321.491113-1-dave@stgolabs.net
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r-- | arch/riscv/include/asm/futex.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h index fc8130f995c1..72be100afa23 100644 --- a/arch/riscv/include/asm/futex.h +++ b/arch/riscv/include/asm/futex.h @@ -85,7 +85,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, __enable_user_access(); __asm__ __volatile__ ( - "1: lr.w.aqrl %[v],%[u] \n" + "1: lr.w %[v],%[u] \n" " bne %[v],%z[ov],3f \n" "2: sc.w.aqrl %[t],%z[nv],%[u] \n" " bnez %[t],1b \n" |