diff options
| author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2025-09-24 07:30:13 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-28 11:23:44 +0300 |
| commit | 9ac98796cd003edd947e11243c17bc04ec28dafa (patch) | |
| tree | 29ed572a1eb3fafc55dc92fa73a0e7a29624880b | |
| parent | ef3db38c5d7ccd840e75b62921abea0f556e04ad (diff) | |
| download | linux-9ac98796cd003edd947e11243c17bc04ec28dafa.tar.xz | |
arm64: dts: renesas: r8a774b1: Move interrupt-parent to root node
Move the "interrupt-parent = <&gic>" property from the soc node to the
root node, and simplify "interrupts-extended = <&gic ...>" to
"interrupts = <...>".
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/87a52ka2wa.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 3f15d656215e..c9857ea944ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -14,6 +14,7 @@ compatible = "renesas,r8a774b1"; #address-cells = <2>; #size-cells = <2>; + interrupt-parent = <&gic>; /* * The external audio clocks are configured as 0 Hz fixed frequency @@ -128,8 +129,8 @@ pmu_a57 { compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&a57_0>, <&a57_1>; }; @@ -147,7 +148,6 @@ soc { compatible = "simple-bus"; - interrupt-parent = <&gic>; bootph-all; #address-cells = <2>; @@ -2734,10 +2734,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; |