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authorConor Dooley <conor.dooley@microchip.com>2025-10-29 18:29:35 +0300
committerLinus Walleij <linus.walleij@linaro.org>2025-10-30 11:18:13 +0300
commit99224c151c19b74e1930d236dd348b6b22a607a5 (patch)
tree022efcab67e2d425b4130a2585119d80198710c6
parent002679f79ed605e543fbace465557317cd307c9a (diff)
downloadlinux-99224c151c19b74e1930d236dd348b6b22a607a5.tar.xz
pinctrl: mpfs-iomux0: fix compile-time constant warning for LLVM prior to 17
With LLVM prior to 17.0.0: drivers/pinctrl/pinctrl-mpfs-iomux0.c:89:2: error: initializer element is not a compile-time constant MPFS_IOMUX0_GROUP(spi0), ^~~~~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/pinctrl-mpfs-iomux0.c:79:10: note: expanded from macro 'MPFS_IOMUX0_GROUP' .mask = BIT(mpfs_iomux0_##_name##_pins[0]), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/vdso/bits.h:7:19: note: expanded from macro 'BIT' \#define BIT(nr) (UL(1) << (nr)) ^~~~~~~~~~~~~~~ This is a constant, but LLVM prior to a change from Nick to match the gcc behaviour did not allow this. The macro isn't really all that much of an idiot-proofing, just change it to the same sort that's in the gpio2 driver, where a second argument provides the mask/setting. Reported-by: Nathan Chancellor <nathan@kernel.org> Link: https://github.com/ClangBuiltLinux/linux/issues/2140 Fixes: 46397274da22 ("pinctrl: add polarfire soc iomux0 pinmux driver") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/pinctrl-mpfs-iomux0.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/pinctrl/pinctrl-mpfs-iomux0.c b/drivers/pinctrl/pinctrl-mpfs-iomux0.c
index 49d9fcec0a16..cf5b2e4e8f5b 100644
--- a/drivers/pinctrl/pinctrl-mpfs-iomux0.c
+++ b/drivers/pinctrl/pinctrl-mpfs-iomux0.c
@@ -73,33 +73,33 @@ static const unsigned int mpfs_iomux0_uart4_pins[] = { 11 };
static const unsigned int mpfs_iomux0_mdio0_pins[] = { 12 };
static const unsigned int mpfs_iomux0_mdio1_pins[] = { 13 };
-#define MPFS_IOMUX0_GROUP(_name) { \
+#define MPFS_IOMUX0_GROUP(_name, _mask) { \
.name = #_name "_mssio", \
.pins = mpfs_iomux0_##_name##_pins, \
- .mask = BIT(mpfs_iomux0_##_name##_pins[0]), \
+ .mask = _mask, \
.setting = 0x0, \
}, { \
.name = #_name "_fabric", \
.pins = mpfs_iomux0_##_name##_pins, \
- .mask = BIT(mpfs_iomux0_##_name##_pins[0]), \
- .setting = BIT(mpfs_iomux0_##_name##_pins[0]), \
+ .mask = _mask, \
+ .setting = _mask, \
}
static const struct mpfs_iomux0_pin_group mpfs_iomux0_pin_groups[] = {
- MPFS_IOMUX0_GROUP(spi0),
- MPFS_IOMUX0_GROUP(spi1),
- MPFS_IOMUX0_GROUP(i2c0),
- MPFS_IOMUX0_GROUP(i2c1),
- MPFS_IOMUX0_GROUP(can0),
- MPFS_IOMUX0_GROUP(can1),
- MPFS_IOMUX0_GROUP(qspi),
- MPFS_IOMUX0_GROUP(uart0),
- MPFS_IOMUX0_GROUP(uart1),
- MPFS_IOMUX0_GROUP(uart2),
- MPFS_IOMUX0_GROUP(uart3),
- MPFS_IOMUX0_GROUP(uart4),
- MPFS_IOMUX0_GROUP(mdio0),
- MPFS_IOMUX0_GROUP(mdio1),
+ MPFS_IOMUX0_GROUP(spi0, BIT(0)),
+ MPFS_IOMUX0_GROUP(spi1, BIT(1)),
+ MPFS_IOMUX0_GROUP(i2c0, BIT(2)),
+ MPFS_IOMUX0_GROUP(i2c1, BIT(3)),
+ MPFS_IOMUX0_GROUP(can0, BIT(4)),
+ MPFS_IOMUX0_GROUP(can1, BIT(5)),
+ MPFS_IOMUX0_GROUP(qspi, BIT(6)),
+ MPFS_IOMUX0_GROUP(uart0, BIT(7)),
+ MPFS_IOMUX0_GROUP(uart1, BIT(8)),
+ MPFS_IOMUX0_GROUP(uart2, BIT(9)),
+ MPFS_IOMUX0_GROUP(uart3, BIT(10)),
+ MPFS_IOMUX0_GROUP(uart4, BIT(11)),
+ MPFS_IOMUX0_GROUP(mdio0, BIT(12)),
+ MPFS_IOMUX0_GROUP(mdio1, BIT(13)),
};
static const char * const mpfs_iomux0_spi0_groups[] = { "spi0_mssio", "spi0_fabric" };