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authorStephen Boyd <sboyd@kernel.org>2026-03-24 03:14:36 +0300
committerStephen Boyd <sboyd@kernel.org>2026-03-24 03:14:36 +0300
commit96df81372d0f4eb74903476bf31967cee1df3480 (patch)
treee88c76cd60edce90f33425dd0483b63f93e6e6da
parente7a45dec40c7ad963ac4beb67cb763874be54c1b (diff)
parentc8d5972a25408b1daf73653ccd5207fdfc80c964 (diff)
downloadlinux-96df81372d0f4eb74903476bf31967cee1df3480.tar.xz
Merge tag 'renesas-clk-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven: - Add RTC clocks and resets on Renesas RZ/V2N * tag 'renesas-clk-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r9a09g056: Add clock and reset entries for RTC
-rw-r--r--drivers/clk/renesas/r9a09g056-cpg.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r9a09g056-cpg.c b/drivers/clk/renesas/r9a09g056-cpg.c
index 70de6bb929b9..549c882f9a18 100644
--- a/drivers/clk/renesas/r9a09g056-cpg.c
+++ b/drivers/clk/renesas/r9a09g056-cpg.c
@@ -289,6 +289,8 @@ static const struct rzv2h_mod_clk r9a09g056_mod_clks[] __initconst = {
BUS_MSTOP(5, BIT(13))),
DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18,
BUS_MSTOP(5, BIT(13))),
+ DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19,
+ BUS_MSTOP(3, BIT(11) | BIT(12))),
DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20,
BUS_MSTOP(11, BIT(0))),
DEF_MOD("rspi_0_pclk_sfr", CLK_PLLCLN_DIV8, 5, 5, 2, 21,
@@ -593,6 +595,8 @@ static const struct rzv2h_reset r9a09g056_resets[] __initconst = {
DEF_RST(9, 2, 4, 3), /* RSCI8_TRESETN */
DEF_RST(9, 3, 4, 4), /* RSCI9_PRESETN */
DEF_RST(9, 4, 4, 5), /* RSCI9_TRESETN */
+ DEF_RST(7, 9, 3, 10), /* RTC_0_RST_RTC */
+ DEF_RST(7, 10, 3, 11), /* RTC_0_RST_RTC_V */
DEF_RST(7, 11, 3, 12), /* RSPI_0_PRESETN */
DEF_RST(7, 12, 3, 13), /* RSPI_0_TRESETN */
DEF_RST(7, 13, 3, 14), /* RSPI_1_PRESETN */