diff options
| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2025-09-08 13:20:51 +0300 |
|---|---|---|
| committer | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2025-09-09 21:38:25 +0300 |
| commit | 955f3bc4af440bb950c7a1567197aaf6aa2213ae (patch) | |
| tree | 0e0ba6fe8b5f236f619a3e03df4453cb15fc23e5 | |
| parent | 30071d58dfcef5da327e2f3b6ce848251814b266 (diff) | |
| download | linux-955f3bc4af440bb950c7a1567197aaf6aa2213ae.tar.xz | |
drm/xe/guc: Always add CT disable action during second init step
On DGFX, during init_post_hwconfig() step, we are reinitializing
CTB BO in VRAM and we have to replace cleanup action to disable CT
communication prior to release of underlying BO.
But that introduces some discrepancy between DGFX and iGFX, as for
iGFX we keep previously added disable CT action that would be called
during unwind much later.
To keep the same flow on both types of platforms, always replace old
cleanup action and register new one.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Link: https://lore.kernel.org/r/20250908102053.539-2-michal.wajdeczko@intel.com
| -rw-r--r-- | drivers/gpu/drm/xe/xe_guc_ct.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c index f40543b040d6..12372d5b7067 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.c +++ b/drivers/gpu/drm/xe/xe_guc_ct.c @@ -300,12 +300,11 @@ int xe_guc_ct_init_post_hwconfig(struct xe_guc_ct *ct) xe_assert(xe, !xe_guc_ct_enabled(ct)); - if (!IS_DGFX(xe)) - return 0; - - ret = xe_managed_bo_reinit_in_vram(xe, tile, &ct->bo); - if (ret) - return ret; + if (IS_DGFX(xe)) { + ret = xe_managed_bo_reinit_in_vram(xe, tile, &ct->bo); + if (ret) + return ret; + } devm_release_action(xe->drm.dev, guc_action_disable_ct, ct); return devm_add_action_or_reset(xe->drm.dev, guc_action_disable_ct, ct); |