diff options
| author | Shiji Yang <yangshiji66@outlook.com> | 2026-01-28 15:42:56 +0300 |
|---|---|---|
| committer | Pratyush Yadav (Google) <pratyush@kernel.org> | 2026-03-13 14:13:46 +0300 |
| commit | 94645aa41bf9ecb87c2ce78b1c3405bfb6074a37 (patch) | |
| tree | 994f14a3cb71fc5531c18f77815cf6421bf7e599 | |
| parent | 6d660fba6a32a34ad7d746d7f65317831daaf033 (diff) | |
| download | linux-94645aa41bf9ecb87c2ce78b1c3405bfb6074a37.tar.xz | |
mtd: spi-nor: swp: check SR_TB flag when getting tb_mask
When the chip does not support top/bottom block protect, the tb_mask
must be set to 0, otherwise SR1 bit5 will be unexpectedly modified.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Fixes: 3dd8012a8eeb ("mtd: spi-nor: add TB (Top/Bottom) protect support")
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav (Google) <pratyush@kernel.org>
| -rw-r--r-- | drivers/mtd/spi-nor/swp.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 9b07f83aeac7..e67a81dbb6bf 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -28,8 +28,10 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) { if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) return SR_TB_BIT6; - else + else if (nor->flags & SNOR_F_HAS_SR_TB) return SR_TB_BIT5; + else + return 0; } static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor) |
