diff options
| author | Dawid Glazik <dawid.glazik@linux.intel.com> | 2026-04-24 23:21:01 +0300 |
|---|---|---|
| committer | Andrew Jeffery <andrew@codeconstruct.com.au> | 2026-05-18 07:47:30 +0300 |
| commit | 91b9aed7381c898758d70fac5aaa4bfa6173761a (patch) | |
| tree | 3824723e4be217d0954a992c9ea15a62405b66a3 | |
| parent | 46ed8942abf52f5929945419ae25be43d50afb1d (diff) | |
| download | linux-91b9aed7381c898758d70fac5aaa4bfa6173761a.tar.xz | |
ARM: dts: aspeed-g6: Add nodes for i3c controllers
Add the i3c controller devices to the ast2600 g6 common dts. We add all
6 busses to the common g6 definition, but leave disabled through the
status property, to be enabled per-platform.
Suggested-by: Jeremy Kerr <jk@codeconstruct.com.au>
Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
Link: https://patch.msgid.link/7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index f5641128614f..51a6a4157f1b 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -1066,6 +1066,97 @@ }; }; + bus@1e7a0000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e7a0000 0x8000>; + + i3c_global: syscon@0 { + compatible = "aspeed,ast2600-i3c-global", "syscon"; + reg = <0x0 0x1000>; + resets = <&syscon ASPEED_RESET_I3C_DMA>; + }; + + i3c0: i3c@2000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x2000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C0CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c1_default>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 0>; + status = "disabled"; + }; + + i3c1: i3c@3000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x3000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C1CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c2_default>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 1>; + status = "disabled"; + }; + + i3c2: i3c@4000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x4000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c3_default>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 2>; + status = "disabled"; + }; + + i3c3: i3c@5000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x5000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C3CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c4_default>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 3>; + status = "disabled"; + }; + + i3c4: i3c@6000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x6000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C4CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c5_default>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 4>; + status = "disabled"; + }; + + i3c5: i3c@7000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x7000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon ASPEED_CLK_GATE_I3C5CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c6_default>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + aspeed,global-regs = <&i3c_global 5>; + status = "disabled"; + }; + }; + fsim0: fsi@1e79b000 { #interrupt-cells = <1>; compatible = "aspeed,ast2600-fsi-master"; |