diff options
| author | Uma Shankar <uma.shankar@intel.com> | 2026-02-05 12:43:36 +0300 |
|---|---|---|
| committer | Uma Shankar <uma.shankar@intel.com> | 2026-02-12 13:43:14 +0300 |
| commit | 8ed752123d5076ef87ba401434e09d0c199ab373 (patch) | |
| tree | 681b329a9949be52956708bae4390d2d331a4e7a | |
| parent | 5344a8bb51e4b0ec2ae7270b941e40983d37d485 (diff) | |
| download | linux-8ed752123d5076ef87ba401434e09d0c199ab373.tar.xz | |
drm/i915: Remove i915_reg.h from intel_psr.c
Move some chicken registers to display header to make
intel_psr.c free from including i915_reg.h.
v3: Update commit header
v2: Use display header instead of gmd common include (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-16-uma.shankar@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_regs.h | 26 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 28 |
3 files changed, 26 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h index d4c5fd975b1b..9a7005e125a9 100644 --- a/drivers/gpu/drm/i915/display/intel_display_regs.h +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h @@ -357,6 +357,32 @@ #define OGAMC1 _MMIO(0x30020) #define OGAMC0 _MMIO(0x30024) +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) +#define _LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31) +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) +#define _LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) +#define _LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) +#define _LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) +#define LATENCY_REPORTING_REMOVED(pipe) _PICK((pipe), \ + _LATENCY_REPORTING_REMOVED_PIPE_A, \ + _LATENCY_REPORTING_REMOVED_PIPE_B, \ + _LATENCY_REPORTING_REMOVED_PIPE_C, \ + _LATENCY_REPORTING_REMOVED_PIPE_D) +#define ICL_DELAY_PMRSP REG_BIT(22) +#define DISABLE_FLR_SRC REG_BIT(15) +#define MASK_WAKEMEM REG_BIT(13) +#define DDI_CLOCK_REG_ACCESS REG_BIT(7) + +#define CHICKEN_PAR1_1 _MMIO(0x42080) +#define IGNORE_KVMR_PIPE_A REG_BIT(23) +#define KBL_ARB_FILL_SPARE_22 REG_BIT(22) +#define DIS_RAM_BYPASS_PSR2_MAN_TRACK REG_BIT(16) +#define SKL_DE_COMPRESSED_HASH_MODE REG_BIT(15) +#define HSW_MASK_VBL_TO_PIPE_IN_SRD REG_BIT(15) /* hsw/bdw */ +#define FORCE_ARB_IDLE_PLANES REG_BIT(14) +#define SKL_EDP_PSR_FIX_RDWRAP REG_BIT(3) +#define IGNORE_PSR2_HW_TRACKING REG_BIT(1) + #define GEN9_CLKGATE_DIS_4 _MMIO(0x4653C) #define BXT_GMBUS_GATING_DIS (1 << 14) #define DG2_DPFC_GATING_DIS REG_BIT(31) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4e644711c571..5bea2eda744b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -29,7 +29,6 @@ #include <drm/drm_print.h> #include <drm/drm_vblank.h> -#include "i915_reg.h" #include "intel_alpm.h" #include "intel_atomic.h" #include "intel_crtc.h" diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9cb753b65bc2..3a54b31bc072 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -805,37 +805,9 @@ #define CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE REG_BIT(5) #define CHICKEN3_DGMG_DONE_FIX_DISABLE REG_BIT(2) -#define CHICKEN_PAR1_1 _MMIO(0x42080) -#define IGNORE_KVMR_PIPE_A REG_BIT(23) -#define KBL_ARB_FILL_SPARE_22 REG_BIT(22) -#define DIS_RAM_BYPASS_PSR2_MAN_TRACK REG_BIT(16) -#define SKL_DE_COMPRESSED_HASH_MODE REG_BIT(15) -#define HSW_MASK_VBL_TO_PIPE_IN_SRD REG_BIT(15) /* hsw/bdw */ -#define FORCE_ARB_IDLE_PLANES REG_BIT(14) -#define SKL_EDP_PSR_FIX_RDWRAP REG_BIT(3) -#define IGNORE_PSR2_HW_TRACKING REG_BIT(1) - #define CHICKEN_PAR2_1 _MMIO(0x42090) #define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT REG_BIT(14) - -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) -#define _LATENCY_REPORTING_REMOVED_PIPE_D REG_BIT(31) -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) -#define _LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) -#define _LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) -#define _LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) -#define LATENCY_REPORTING_REMOVED(pipe) _PICK((pipe), \ - _LATENCY_REPORTING_REMOVED_PIPE_A, \ - _LATENCY_REPORTING_REMOVED_PIPE_B, \ - _LATENCY_REPORTING_REMOVED_PIPE_C, \ - _LATENCY_REPORTING_REMOVED_PIPE_D) -#define ICL_DELAY_PMRSP REG_BIT(22) -#define DISABLE_FLR_SRC REG_BIT(15) -#define MASK_WAKEMEM REG_BIT(13) -#define DDI_CLOCK_REG_ACCESS REG_BIT(7) - - #define VLV_PMWGICZ _MMIO(0x1300a4) #define HSW_EDRAM_CAP _MMIO(0x120010) |