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authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>2026-01-06 04:01:17 +0300
committerBjorn Andersson <andersson@kernel.org>2026-01-15 23:07:38 +0300
commit8bfb696ccdc5bcfad7a45b84c2c8a36757070e19 (patch)
tree131d8f4154ea70e767621f06faa53691f59bd523
parentc5dc4812f6bf397b82290c540085e9ec98b47b30 (diff)
downloadlinux-8bfb696ccdc5bcfad7a45b84c2c8a36757070e19.tar.xz
arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0
On SDM845 SPI uses hardware-provided chip select, while specifying cs-gpio makes the driver request GPIO pin, which on DB845c conflicts with the normal host controllers pinctrl entry. Drop the cs-gpios property to restore SPI functionality. Fixes: cb29e7106d4e ("arm64: dts: qcom: db845c: Add support for MCP2517FD") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-7-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-db845c.dts1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index ce23f87e0316..ad283a79bcdb 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -850,7 +850,6 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qup_spi0_default>;
- cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
can@0 {
compatible = "microchip,mcp2517fd";