diff options
| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2025-06-05 19:11:10 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-11 01:35:22 +0300 |
| commit | 84d8beaf11571d45f1a46b7c39fc374026f3f072 (patch) | |
| tree | ec2f32fe2ecc5772b5f67b8dbe843fed1c349341 | |
| parent | 7ce7234189a84b1e0a8088b725d400c56ccdab3a (diff) | |
| download | linux-84d8beaf11571d45f1a46b7c39fc374026f3f072.tar.xz | |
drm/amdgpu: Add switch_compute_partition callback for imu v12_1
To enable switching compute partition mode
v2: cleanup (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/imu_v12_1.c | 19 |
2 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h index 484e936812e4..ac4fd4f46133 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h @@ -36,6 +36,8 @@ struct amdgpu_imu_funcs { int (*start_imu)(struct amdgpu_device *adev); void (*program_rlc_ram)(struct amdgpu_device *adev); int (*wait_for_reset_status)(struct amdgpu_device *adev); + int (*switch_compute_partition)(struct amdgpu_device *adev, + int num_xccs_per_xcp); }; struct imu_rlc_ram_golden { diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v12_1.c b/drivers/gpu/drm/amd/amdgpu/imu_v12_1.c index 28932604d986..9dc4bf2493cf 100644 --- a/drivers/gpu/drm/amd/amdgpu/imu_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/imu_v12_1.c @@ -133,7 +133,26 @@ static int imu_v12_1_load_microcode(struct amdgpu_device *adev) return 0; } +static int imu_v12_1_switch_compute_partition(struct amdgpu_device *adev, + int num_xccs_per_xcp) +{ + int ret; + + if (adev->psp.funcs) { + ret = psp_spatial_partition(&adev->psp, + NUM_XCC(adev->gfx.xcc_mask) / + num_xccs_per_xcp); + if (ret) + return ret; + } + + adev->gfx.num_xcc_per_xcp = num_xccs_per_xcp; + + return 0; +} + const struct amdgpu_imu_funcs gfx_v12_1_imu_funcs = { .init_microcode = imu_v12_1_init_microcode, .load_microcode = imu_v12_1_load_microcode, + .switch_compute_partition = imu_v12_1_switch_compute_partition, }; |
