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| author | Luca Weiss <luca@lucaweiss.eu> | 2025-10-28 19:40:50 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-01-19 22:24:20 +0300 |
| commit | 842c0aa3e04201bc13f51f5ce9edbb8100ef0d73 (patch) | |
| tree | 0613bb13ad7ee3892a8ae4e711f8bcaa31da6f85 | |
| parent | 589deb6bc2757787f2b15a84017c23839db3bf8e (diff) | |
| download | linux-842c0aa3e04201bc13f51f5ce9edbb8100ef0d73.tar.xz | |
arm64: dts: qcom: msm8953: Add CCI nodes
Add the nodes for the camera I2C bus on the MSM8953 SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Link: https://lore.kernel.org/r/20251028-msm8953-cci-v2-5-b5f9f7135326@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8953.dtsi | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 7884a3ed8aef..753167c3f861 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -753,6 +753,20 @@ bias-disable; }; + cci0_default: cci0-default-state { + pins = "gpio29", "gpio30"; + function = "cci_i2c"; + drive-strength = <2>; + bias-disable; + }; + + cci1_default: cci1-default-state { + pins = "gpio31", "gpio32"; + function = "cci_i2c"; + drive-strength = <2>; + bias-disable; + }; + wcnss_pin_a: wcnss-active-state { wcss-wlan2-pins { pins = "gpio76"; @@ -1200,6 +1214,49 @@ }; }; + cci: cci@1b0c000 { + compatible = "qcom,msm8953-cci"; + reg = <0x1b0c000 0x4000>; + + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates = <80000000>, + <19200000>; + + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + gpu: gpu@1c00000 { compatible = "qcom,adreno-506.0", "qcom,adreno"; reg = <0x01c00000 0x40000>; |