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authorHawking Zhang <Hawking.Zhang@amd.com>2026-01-17 12:18:10 +0300
committerAlex Deucher <alexander.deucher@amd.com>2026-03-17 17:32:05 +0300
commit8392ca2d7ef3a8a8f16c24ec52a1315efae52f76 (patch)
tree732f11accf338b07c51f69f298cf4ccca6137920
parent5aca9e0e82c541740428746400d7dcc90f4e0820 (diff)
downloadlinux-8392ca2d7ef3a8a8f16c24ec52a1315efae52f76.tar.xz
drm/amdgpu/gmc12: Set up pdb0 for vmid0 page table
Alloc, Init and free pdb0 for vmid0 page table that is used for fb translation on A + A platform Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index f5a328bb421d..654c1c7adfae 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -783,7 +783,14 @@ static int gmc_v12_0_gart_init(struct amdgpu_device *adev)
AMDGPU_PTE_EXECUTABLE |
AMDGPU_PTE_IS_PTE;
- return amdgpu_gart_table_vram_alloc(adev);
+ r = amdgpu_gart_table_vram_alloc(adev);
+ if (r)
+ return r;
+
+ if (amdgpu_gmc_is_pdb0_enabled(adev))
+ r = amdgpu_gmc_pdb0_alloc(adev);
+
+ return r;
}
static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
@@ -955,6 +962,7 @@ static int gmc_v12_0_sw_fini(struct amdgpu_ip_block *ip_block)
amdgpu_vm_manager_fini(adev);
gmc_v12_0_gart_fini(adev);
amdgpu_gem_force_release(adev);
+ amdgpu_bo_free_kernel(&adev->gmc.pdb0_bo, NULL, &adev->gmc.ptr_pdb0);
amdgpu_bo_fini(adev);
return 0;
@@ -974,6 +982,9 @@ static int gmc_v12_0_gart_enable(struct amdgpu_device *adev)
int r;
bool value;
+ if (adev->gmc.xgmi.connected_to_cpu)
+ amdgpu_gmc_init_pdb0(adev);
+
if (adev->gart.bo == NULL) {
dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
return -EINVAL;
@@ -995,6 +1006,7 @@ static int gmc_v12_0_gart_enable(struct amdgpu_device *adev)
drm_info(adev_to_drm(adev), "PCIE GART of %uM enabled (table at 0x%016llX).\n",
(unsigned)(adev->gmc.gart_size >> 20),
+ (adev->gmc.pdb0_bo) ? (unsigned long long)amdgpu_bo_gpu_offset(adev->gmc.pdb0_bo) :
(unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo));
return 0;