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authorQiang Yu <qiang.yu@oss.qualcomm.com>2025-11-10 09:59:43 +0300
committerManivannan Sadhasivam <mani@kernel.org>2025-12-18 10:32:02 +0300
commit7c29cd0fdc07e5e21202fdeed0b63cba2b4f10c6 (patch)
tree5765c6e71cd8574fec222436af134962b123fc96
parentf5cd8a929c825ad4df3972df041ad62ad84ca6c9 (diff)
downloadlinux-7c29cd0fdc07e5e21202fdeed0b63cba2b4f10c6.tar.xz
PCI: qcom: Remove MSI-X Capability for Root Ports
On some platforms like Glymur, the hardware does not support MSI-X in RC mode, yet still exposes the MSI-X capability. However, it omits the required MSI-X Table and PBA structures. This mismatch can lead to issues where the PCIe port driver requests MSI-X instead of MSI, causing the Root Port to trigger interrupts by writing to an uninitialized address, resulting in SMMU faults. To address this, remove MSI-X capability unconditionally for Root Ports of all SoCs as none of the Qcom PCIe Root Ports support MSI-X. Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> [mani: updated description] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251109-remove_cap-v1-4-2208f46f4dc2@oss.qualcomm.com
-rw-r--r--drivers/pci/controller/dwc/pcie-qcom.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 7b92e7a1c0d9..8b8948fef386 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1316,6 +1316,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
goto err_disable_phy;
}
+ dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
+
qcom_ep_reset_deassert(pcie);
if (pcie->cfg->ops->config_sid) {