diff options
| author | Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2025-12-23 13:45:30 +0300 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-12-30 07:30:25 +0300 |
| commit | 7bf11bc2f716f6824b3b3d418319967213aab2a5 (patch) | |
| tree | 8d0a712e4ae919a4ca0524a38a9210a33aedc8fb | |
| parent | 2873c8eaa1e9020b2cfa7abe39ea69af9f93058a (diff) | |
| download | linux-7bf11bc2f716f6824b3b3d418319967213aab2a5.tar.xz | |
drm/i915/vrr: Add function to check if DC Balance Possible
Add a function that checks if DC Balance enabling is possible on the
requested PIPE. Apart from the DISPLAY_VER check, account for current
firmware limitations, which only allow DC Balance on PIPE A and PIPE B.
v2: Rephrased commit message. (Ankit)
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-9-mitulkumar.ajitkumar.golani@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_vrr.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 952e3c31bacc..dbfe56e8973d 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -351,13 +351,28 @@ int intel_vrr_compute_vmax(struct intel_connector *connector, return vmax; } +static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + enum pipe pipe = crtc->pipe; + + /* + * FIXME: Currently Firmware supports DC Balancing on PIPE A + * and PIPE B. Account those limitation while computing DC + * Balance parameters. + */ + return (HAS_VRR_DC_BALANCE(display) && + ((pipe == PIPE_A) || (pipe == PIPE_B))); +} + static void intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state) { int guardband_usec, adjustment_usec; struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!HAS_VRR_DC_BALANCE(display) || !crtc_state->vrr.enable) + if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable) return; crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax; @@ -839,7 +854,7 @@ void intel_vrr_get_dc_balance_config(struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; - if (!HAS_VRR_DC_BALANCE(display)) + if (!intel_vrr_dc_balance_possible(crtc_state)) return; reg_val = intel_de_read(display, PIPEDMC_DCB_VMIN(pipe)); |