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| author | Jani Nikula <jani.nikula@intel.com> | 2025-09-17 16:52:00 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-09-18 09:28:41 +0300 |
| commit | 7a356ee5cf6dad1c7d305eea261a03a925454ed6 (patch) | |
| tree | 004bdd132d1e33e82e149021b2d9060933ca4499 | |
| parent | fcf2af765c1e4f47f2fc8aa8ce7d368fc5728f46 (diff) | |
| download | linux-7a356ee5cf6dad1c7d305eea261a03a925454ed6.tar.xz | |
drm/i915: add note on VLV/CHV hpll_freq and czclk_freq caching
The caching at the initial read is a bit fragile in case, say, a further
refactoring starts reading the frequencies at a time where it's not
possible. Add a note about it.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250917135200.1932903-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/vlv_clock.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/vlv_clock.c b/drivers/gpu/drm/i915/display/vlv_clock.c index 2c55083d8fdb..42c2837b32c1 100644 --- a/drivers/gpu/drm/i915/display/vlv_clock.c +++ b/drivers/gpu/drm/i915/display/vlv_clock.c @@ -8,6 +8,13 @@ #include "vlv_clock.h" #include "vlv_sideband.h" +/* + * FIXME: The caching of hpll_freq and czclk_freq relies on the first calls + * occurring at a time when they can actually be read. This appears to be the + * case, but is somewhat fragile. Make the initialization explicit at a point + * where they can be reliably read. + */ + /* returns HPLL frequency in kHz */ int vlv_clock_get_hpll_vco(struct drm_device *drm) { |