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authorLeo Yan <leo.yan@linaro.org>2020-10-15 17:45:48 +0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2020-10-15 18:02:12 +0300
commit744aec4df2c5b4d12af26a57d8858af2f59ef3d0 (patch)
tree852a0ef8fba6c8d075097ee40b1da945e3a570ab
parent91d933c22164e22315f860e7177fbeec5e8510b0 (diff)
downloadlinux-744aec4df2c5b4d12af26a57d8858af2f59ef3d0.tar.xz
perf c2c: Update documentation for metrics reorganization
The output format for metrics has been reorganized, update documentation to reflect the changes for it. Signed-off-by: Leo Yan <leo.yan@linaro.org> Cc: Al Grant <al.grant@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Ian Rogers <irogers@google.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20201015144548.18482-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
-rw-r--r--tools/perf/Documentation/perf-c2c.txt34
1 files changed, 18 insertions, 16 deletions
diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt
index 98efdab5fbd4..c81d72e3eecf 100644
--- a/tools/perf/Documentation/perf-c2c.txt
+++ b/tools/perf/Documentation/perf-c2c.txt
@@ -174,34 +174,36 @@ For each cacheline in the 1) list we display following data:
Cacheline
- cacheline address (hex number)
- Total records
- - sum of all cachelines accesses
-
Rmt/Lcl Hitm
- cacheline percentage of all Remote/Local HITM accesses
- LLC Load Hitm - Total, Lcl, Rmt
+ LLC Load Hitm - Total, LclHitm, RmtHitm
- count of Total/Local/Remote load HITMs
- Store Reference - Total, L1Hit, L1Miss
- Total - all store accesses
- L1Hit - store accesses that hit L1
- L1Hit - store accesses that missed L1
+ Total records
+ - sum of all cachelines accesses
- Load Dram
- - count of local and remote DRAM accesses
+ Total loads
+ - sum of all load accesses
- LLC Ld Miss
- - count of all accesses that missed LLC
+ Total stores
+ - sum of all store accesses
- Total Loads
- - sum of all load accesses
+ Store Reference - L1Hit, L1Miss
+ L1Hit - store accesses that hit L1
+ L1Miss - store accesses that missed L1
Core Load Hit - FB, L1, L2
- count of load hits in FB (Fill Buffer), L1 and L2 cache
- LLC Load Hit - Llc, Rmt
- - count of LLC and Remote load hits
+ LLC Load Hit - LlcHit, LclHitm
+ - count of LLC load accesses, includes LLC hits and LLC HITMs
+
+ RMT Load Hit - RmtHit, RmtHitm
+ - count of remote load accesses, includes remote hits and remote HITMs
+
+ Load Dram - Lcl, Rmt
+ - count of local and remote DRAM accesses
For each offset in the 2) list we display following data: