diff options
| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2025-11-19 17:35:22 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-01-05 16:37:17 +0300 |
| commit | 73b73af99a49fd7bf0515741734660973fa2002a (patch) | |
| tree | f548f200d2d2370d65d5c0108eb91f5e095602fa | |
| parent | 1a66160fb28abcd228f69e00bb183a4749f23805 (diff) | |
| download | linux-73b73af99a49fd7bf0515741734660973fa2002a.tar.xz | |
arm64: dts: renesas: rzg3s-smarc: Enable PCIe
The RZ Smarc Carrier-II board has PCIe headers mounted on it. Enable PCIe
support.
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 6b0bb2c441af..70af605168b0 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -155,6 +155,12 @@ status = "okay"; }; +&pcie { + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &phyrst { status = "okay"; }; @@ -186,6 +192,11 @@ line-name = "key-3-gpio-irq"; }; + pcie_pins: pcie { + pinmux = <RZG2L_PORT_PINMUX(13, 2, 2)>, /* PCIE_RST_OUT_B */ + <RZG2L_PORT_PINMUX(13, 3, 2)>; /* PCIE_CLKREQ_B */ + }; + scif0_pins: scif0 { pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */ <RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */ |