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| author | Imre Deak <imre.deak@intel.com> | 2026-02-09 16:38:17 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2026-02-10 12:12:02 +0300 |
| commit | 7229474d415485b1d864ee7935f2f64ce858eee0 (patch) | |
| tree | b609bf064840e1ab9c357a9d88566c0338aef3ce | |
| parent | 08b7ef16b6a03e8c966e286ee1ac608a6ffb3d4a (diff) | |
| download | linux-7229474d415485b1d864ee7935f2f64ce858eee0.tar.xz | |
drm/i915/dp: Verify valid pipe BPP range
Ensure that the pipe BPP range is valid after calculating the minimum
and maximum pipe BPP values separately.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260209133817.395823-2-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7fd20df10f26..48845899298e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2745,6 +2745,15 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, crtc_state))); } + if (limits->pipe.min_bpp <= 0 || + limits->pipe.min_bpp > limits->pipe.max_bpp) { + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] Invalid pipe bpp range: %d-%d\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp); + + return false; + } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) return false; |