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| author | Bjorn Helgaas <bhelgaas@google.com> | 2019-01-03 00:31:15 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-01-03 00:31:15 +0300 |
| commit | 72199051af6205049e96ee7ed34f4fc5f44d1baf (patch) | |
| tree | 86d93c811d94b6f4f33801963d830c359e2dd213 | |
| parent | cdf4f4dc118bafd97d0148d53730e396ece11afa (diff) | |
| parent | 75cb8d20c112aba70f23d98e3f8d0a38ace16006 (diff) | |
| download | linux-72199051af6205049e96ee7ed34f4fc5f44d1baf.tar.xz | |
Merge branch 'pci/imx6'
- Enable MSI for imx6 downstream components (Richard Zhu)
* pci/imx6:
PCI: imx: Enable MSI from downstream components
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 25a2b7683e55..03107cc25dfc 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -74,6 +74,7 @@ struct imx6_pcie { #define PHY_PLL_LOCK_WAIT_USLEEP_MAX 200 /* PCIe Root Complex registers (memory-mapped) */ +#define PCIE_RC_IMX6_MSI_CAP 0x50 #define PCIE_RC_LCR 0x7c #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1 0x1 #define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2 @@ -926,6 +927,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) struct resource *dbi_base; struct device_node *node = dev->of_node; int ret; + u16 val; imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL); if (!imx6_pcie) @@ -1071,6 +1073,14 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret < 0) return ret; + if (pci_msi_enabled()) { + val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP + + PCI_MSI_FLAGS); + val |= PCI_MSI_FLAGS_ENABLE; + dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP + PCI_MSI_FLAGS, + val); + } + return 0; } |