Merge tag 'qcom-arm32-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm32 DeviceTree updates for v7.1

Qualcomm APQ8084 is incomplete and hasn't seen functional contributions
since 2016, so drop the platform (for now?). Also drop a number of
unused IPQ-related dtsi files.

Lastly clean up the RPM bus clocks in MSM8974 interconnect nodes.

* tag 'qcom-arm32-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: msm8974: Drop RPM bus clocks
  ARM: dts: qcom: drop apq8084 support
  ARM: dts: qcom: Drop unused .dtsi

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

11 files changed, 3 insertions, 1093 deletions

diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
index c7873dcef154..32a44b02d2fa 100644
--- a/arch/arm/boot/dts/qcom/Makefile
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -14,8 +14,6 @@ dtb-$(CONFIG_ARCH_QCOM) += \
 	qcom-apq8064-asus-nexus7-flo.dtb \
 	qcom-apq8064-lg-nexus4-mako.dtb \
 	qcom-apq8074-dragonboard.dtb \
-	qcom-apq8084-ifc6540.dtb \
-	qcom-apq8084-mtp.dtb \
 	qcom-ipq4018-ap120c-ac.dtb \
 	qcom-ipq4018-ap120c-ac-bit.dtb \
 	qcom-ipq4018-jalapeno.dtb \
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom/qcom-apq8084-ifc6540.dts
deleted file mode 100644
index 1df24c922be9..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-apq8084-ifc6540.dts
+++ /dev/null
@@ -1,34 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-apq8084.dtsi"
-#include "pma8084.dtsi"
-
-/ {
-	model = "Qualcomm APQ8084/IFC6540";
-	compatible = "qcom,apq8084-sbc", "qcom,apq8084";
-
-	aliases {
-		serial0 = &blsp2_uart2;
-		usid0 = &pma8084_0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	soc {
-		serial@f995e000 {
-			status = "okay";
-		};
-	};
-};
-
-&sdhc_1 {
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-&sdhc_2 {
-	cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
-	bus-width = <4>;
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084-mtp.dts b/arch/arm/boot/dts/qcom/qcom-apq8084-mtp.dts
deleted file mode 100644
index d4e6aee034af..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-apq8084-mtp.dts
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-apq8084.dtsi"
-#include "pma8084.dtsi"
-
-/ {
-	model = "Qualcomm APQ 8084-MTP";
-	compatible = "qcom,apq8084-mtp", "qcom,apq8084";
-
-	aliases {
-		serial0 = &blsp2_uart2;
-		usid0 = &pma8084_0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	soc {
-		serial@f995e000 {
-			status = "okay";
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi
deleted file mode 100644
index cee0694ef127..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi
+++ /dev/null
@@ -1,852 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-apq8084.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-	model = "Qualcomm APQ 8084";
-	compatible = "qcom,apq8084";
-	interrupt-parent = <&intc>;
-
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		smem_mem: smem-region@fa00000 {
-			reg = <0xfa00000 0x200000>;
-			no-map;
-		};
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <0>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&l2>;
-			qcom,acc = <&acc0>;
-			qcom,saw = <&saw0>;
-			cpu-idle-states = <&cpu_spc>;
-		};
-
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <1>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&l2>;
-			qcom,acc = <&acc1>;
-			qcom,saw = <&saw1>;
-			cpu-idle-states = <&cpu_spc>;
-		};
-
-		cpu@2 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <2>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&l2>;
-			qcom,acc = <&acc2>;
-			qcom,saw = <&saw2>;
-			cpu-idle-states = <&cpu_spc>;
-		};
-
-		cpu@3 {
-			device_type = "cpu";
-			compatible = "qcom,krait";
-			reg = <3>;
-			enable-method = "qcom,kpss-acc-v2";
-			next-level-cache = <&l2>;
-			qcom,acc = <&acc3>;
-			qcom,saw = <&saw3>;
-			cpu-idle-states = <&cpu_spc>;
-		};
-
-		l2: l2-cache {
-			compatible = "cache";
-			cache-level = <2>;
-			cache-unified;
-			qcom,saw = <&saw_l2>;
-		};
-
-		idle-states {
-			cpu_spc: cpu-spc {
-				compatible = "qcom,idle-state-spc",
-						"arm,idle-state";
-				entry-latency-us = <150>;
-				exit-latency-us = <200>;
-				min-residency-us = <2000>;
-			};
-		};
-	};
-
-	memory {
-		device_type = "memory";
-		reg = <0x0 0x0>;
-	};
-
-	firmware {
-		scm {
-			compatible = "qcom,scm-apq8084", "qcom,scm";
-			clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
-			clock-names = "core", "bus", "iface";
-		};
-	};
-
-	thermal-zones {
-		cpu0-thermal {
-			polling-delay-passive = <250>;
-			polling-delay = <1000>;
-
-			thermal-sensors = <&tsens 5>;
-
-			trips {
-				cpu_alert0: trip0 {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_crit0: trip1 {
-					temperature = <110000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-		};
-
-		cpu1-thermal {
-			polling-delay-passive = <250>;
-			polling-delay = <1000>;
-
-			thermal-sensors = <&tsens 6>;
-
-			trips {
-				cpu_alert1: trip0 {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_crit1: trip1 {
-					temperature = <110000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-		};
-
-		cpu2-thermal {
-			polling-delay-passive = <250>;
-			polling-delay = <1000>;
-
-			thermal-sensors = <&tsens 7>;
-
-			trips {
-				cpu_alert2: trip0 {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_crit2: trip1 {
-					temperature = <110000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-		};
-
-		cpu3-thermal {
-			polling-delay-passive = <250>;
-			polling-delay = <1000>;
-
-			thermal-sensors = <&tsens 8>;
-
-			trips {
-				cpu_alert3: trip0 {
-					temperature = <75000>;
-					hysteresis = <2000>;
-					type = "passive";
-				};
-				cpu_crit3: trip1 {
-					temperature = <110000>;
-					hysteresis = <2000>;
-					type = "critical";
-				};
-			};
-		};
-	};
-
-	cpu-pmu {
-		compatible = "qcom,krait-pmu";
-		interrupts = <GIC_PPI 7 0xf04>;
-	};
-
-	clocks {
-		xo_board: xo_board {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <19200000>;
-		};
-
-		sleep_clk: sleep_clk {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <32768>;
-		};
-	};
-
-	timer {
-		compatible = "arm,armv7-timer";
-		interrupts = <GIC_PPI 2 0xf08>,
-			     <GIC_PPI 3 0xf08>,
-			     <GIC_PPI 4 0xf08>,
-			     <GIC_PPI 1 0xf08>;
-		clock-frequency = <19200000>;
-	};
-
-	smem {
-		compatible = "qcom,smem";
-
-		qcom,rpm-msg-ram = <&rpm_msg_ram>;
-		memory-region = <&smem_mem>;
-
-		hwlocks = <&tcsr_mutex 3>;
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		compatible = "simple-bus";
-
-		intc: interrupt-controller@f9000000 {
-			compatible = "qcom,msm-qgic2";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0xf9000000 0x1000>,
-			      <0xf9002000 0x1000>;
-		};
-
-		apcs: syscon@f9011000 {
-			compatible = "syscon";
-			reg = <0xf9011000 0x1000>;
-		};
-
-		sram@fc190000 {
-			compatible = "qcom,apq8084-rpm-stats";
-			reg = <0xfc190000 0x10000>;
-		};
-
-		qfprom: efuse@fc4bc000 {
-			compatible = "qcom,apq8084-qfprom", "qcom,qfprom";
-			reg = <0xfc4bc000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			tsens_base1: base1@d0 {
-				reg = <0xd0 0x1>;
-				bits = <0 8>;
-			};
-
-			tsens_s0_p1: s0-p1@d1 {
-				reg = <0xd1 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s1_p1: s1-p1@d2 {
-				reg = <0xd1 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s2_p1: s2-p1@d2 {
-				reg = <0xd2 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s3_p1: s3-p1@d3 {
-				reg = <0xd3 0x1>;
-				bits = <2 6>;
-			};
-
-			tsens_s4_p1: s4-p1@d4 {
-				reg = <0xd4 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s5_p1: s5-p1@d4 {
-				reg = <0xd4 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s6_p1: s6-p1@d5 {
-				reg = <0xd5 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s7_p1: s7-p1@d6 {
-				reg = <0xd6 0x1>;
-				bits = <2 6>;
-			};
-
-			tsens_s8_p1: s8-p1@d7 {
-				reg = <0xd7 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_mode: mode@d7 {
-				reg = <0xd7 0x1>;
-				bits = <6 2>;
-			};
-
-			tsens_s9_p1: s9-p1@d8 {
-				reg = <0xd8 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s10_p1: s10-p1@d8 {
-				reg = <0xd8 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_base2: base2@d9 {
-				reg = <0xd9 0x2>;
-				bits = <4 8>;
-			};
-
-			tsens_s0_p2: s0-p2@da {
-				reg = <0xda 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s1_p2: s1-p2@db {
-				reg = <0xdb 0x1>;
-				bits = <2 6>;
-			};
-
-			tsens_s2_p2: s2-p2@dc {
-				reg = <0xdc 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s3_p2: s3-p2@dc {
-				reg = <0xdc 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s4_p2: s4-p2@dd {
-				reg = <0xdd 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s5_p2: s5-p2@de {
-				reg = <0xde 0x2>;
-				bits = <2 6>;
-			};
-
-			tsens_s6_p2: s6-p2@df {
-				reg = <0xdf 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s7_p2: s7-p2@e0 {
-				reg = <0xe0 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s8_p2: s8-p2@e0 {
-				reg = <0xe0 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s9_p2: s9-p2@e1 {
-				reg = <0xe1 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s10_p2: s10-p2@e2 {
-				reg = <0xe2 0x2>;
-				bits = <2 6>;
-			};
-
-			tsens_s5_p2_backup: s5-p2-backup@e3 {
-				reg = <0xe3 0x2>;
-				bits = <0 6>;
-			};
-
-			tsens_mode_backup: mode-backup@e3 {
-				reg = <0xe3 0x1>;
-				bits = <6 2>;
-			};
-
-			tsens_s6_p2_backup: s6-p2-backup@e4 {
-				reg = <0xe4 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s7_p2_backup: s7-p2-backup@e4 {
-				reg = <0xe4 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s8_p2_backup: s8-p2-backup@e5 {
-				reg = <0xe5 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s9_p2_backup: s9-p2-backup@e6 {
-				reg = <0xe6 0x2>;
-				bits = <2 6>;
-			};
-
-			tsens_s10_p2_backup: s10-p2-backup@e7 {
-				reg = <0xe7 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_base1_backup: base1-backup@440 {
-				reg = <0x440 0x1>;
-				bits = <0 8>;
-			};
-
-			tsens_s0_p1_backup: s0-p1-backup@441 {
-				reg = <0x441 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s1_p1_backup: s1-p1-backup@442 {
-				reg = <0x441 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s2_p1_backup: s2-p1-backup@442 {
-				reg = <0x442 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s3_p1_backup: s3-p1-backup@443 {
-				reg = <0x443 0x1>;
-				bits = <2 6>;
-			};
-
-			tsens_s4_p1_backup: s4-p1-backup@444 {
-				reg = <0x444 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s5_p1_backup: s5-p1-backup@444 {
-				reg = <0x444 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s6_p1_backup: s6-p1-backup@445 {
-				reg = <0x445 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s7_p1_backup: s7-p1-backup@446 {
-				reg = <0x446 0x1>;
-				bits = <2 6>;
-			};
-
-			tsens_use_backup: use-backup@447 {
-				reg = <0x447 0x1>;
-				bits = <5 3>;
-			};
-
-			tsens_s8_p1_backup: s8-p1-backup@448 {
-				reg = <0x448 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s9_p1_backup: s9-p1-backup@448 {
-				reg = <0x448 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s10_p1_backup: s10-p1-backup@449 {
-				reg = <0x449 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_base2_backup: base2-backup@44a {
-				reg = <0x44a 0x2>;
-				bits = <2 8>;
-			};
-
-			tsens_s0_p2_backup: s0-p2-backup@44b {
-				reg = <0x44b 0x3>;
-				bits = <2 6>;
-			};
-
-			tsens_s1_p2_backup: s1-p2-backup@44c {
-				reg = <0x44c 0x1>;
-				bits = <0 6>;
-			};
-
-			tsens_s2_p2_backup: s2-p2-backup@44c {
-				reg = <0x44c 0x2>;
-				bits = <6 6>;
-			};
-
-			tsens_s3_p2_backup: s3-p2-backup@44d {
-				reg = <0x44d 0x2>;
-				bits = <4 6>;
-			};
-
-			tsens_s4_p2_backup: s4-p2-backup@44e {
-				reg = <0x44e 0x1>;
-				bits = <2 6>;
-			};
-		};
-
-		tsens: thermal-sensor@fc4a9000 {
-			compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
-			reg = <0xfc4a9000 0x1000>, /* TM */
-			      <0xfc4a8000 0x1000>; /* SROT */
-			nvmem-cells = <&tsens_mode>,
-				      <&tsens_base1>, <&tsens_base2>,
-				      <&tsens_use_backup>,
-				      <&tsens_mode_backup>,
-				      <&tsens_base1_backup>, <&tsens_base2_backup>,
-				      <&tsens_s0_p1>, <&tsens_s0_p2>,
-				      <&tsens_s1_p1>, <&tsens_s1_p2>,
-				      <&tsens_s2_p1>, <&tsens_s2_p2>,
-				      <&tsens_s3_p1>, <&tsens_s3_p2>,
-				      <&tsens_s4_p1>, <&tsens_s4_p2>,
-				      <&tsens_s5_p1>, <&tsens_s5_p2>,
-				      <&tsens_s6_p1>, <&tsens_s6_p2>,
-				      <&tsens_s7_p1>, <&tsens_s7_p2>,
-				      <&tsens_s8_p1>, <&tsens_s8_p2>,
-				      <&tsens_s9_p1>, <&tsens_s9_p2>,
-				      <&tsens_s10_p1>, <&tsens_s10_p2>,
-				      <&tsens_s0_p1_backup>, <&tsens_s0_p2_backup>,
-				      <&tsens_s1_p1_backup>, <&tsens_s1_p2_backup>,
-				      <&tsens_s2_p1_backup>, <&tsens_s2_p2_backup>,
-				      <&tsens_s3_p1_backup>, <&tsens_s3_p2_backup>,
-				      <&tsens_s4_p1_backup>, <&tsens_s4_p2_backup>,
-				      <&tsens_s5_p1_backup>, <&tsens_s5_p2_backup>,
-				      <&tsens_s6_p1_backup>, <&tsens_s6_p2_backup>,
-				      <&tsens_s7_p1_backup>, <&tsens_s7_p2_backup>,
-				      <&tsens_s8_p1_backup>, <&tsens_s8_p2_backup>,
-				      <&tsens_s9_p1_backup>, <&tsens_s9_p2_backup>,
-				      <&tsens_s10_p1_backup>, <&tsens_s10_p2_backup>;
-			nvmem-cell-names = "mode",
-					   "base1", "base2",
-					   "use_backup",
-					   "mode_backup",
-					   "base1_backup", "base2_backup",
-					   "s0_p1", "s0_p2",
-					   "s1_p1", "s1_p2",
-					   "s2_p1", "s2_p2",
-					   "s3_p1", "s3_p2",
-					   "s4_p1", "s4_p2",
-					   "s5_p1", "s5_p2",
-					   "s6_p1", "s6_p2",
-					   "s7_p1", "s7_p2",
-					   "s8_p1", "s8_p2",
-					   "s9_p1", "s9_p2",
-					   "s10_p1", "s10_p2",
-					   "s0_p1_backup", "s0_p2_backup",
-					   "s1_p1_backup", "s1_p2_backup",
-					   "s2_p1_backup", "s2_p2_backup",
-					   "s3_p1_backup", "s3_p2_backup",
-					   "s4_p1_backup", "s4_p2_backup",
-					   "s5_p1_backup", "s5_p2_backup",
-					   "s6_p1_backup", "s6_p2_backup",
-					   "s7_p1_backup", "s7_p2_backup",
-					   "s8_p1_backup", "s8_p2_backup",
-					   "s9_p1_backup", "s9_p2_backup",
-					   "s10_p1_backup", "s10_p2_backup";
-			#qcom,sensors = <11>;
-			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "uplow";
-			#thermal-sensor-cells = <1>;
-		};
-		timer@f9020000 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-			compatible = "arm,armv7-timer-mem";
-			reg = <0xf9020000 0x1000>;
-			clock-frequency = <19200000>;
-
-			frame@f9021000 {
-				frame-number = <0>;
-				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9021000 0x1000>,
-				      <0xf9022000 0x1000>;
-			};
-
-			frame@f9023000 {
-				frame-number = <1>;
-				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9023000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9024000 {
-				frame-number = <2>;
-				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9024000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9025000 {
-				frame-number = <3>;
-				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9025000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9026000 {
-				frame-number = <4>;
-				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9026000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9027000 {
-				frame-number = <5>;
-				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9027000 0x1000>;
-				status = "disabled";
-			};
-
-			frame@f9028000 {
-				frame-number = <6>;
-				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0xf9028000 0x1000>;
-				status = "disabled";
-			};
-		};
-
-		saw0: power-manager@f9089000 {
-			compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
-			reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
-		};
-
-		saw1: power-manager@f9099000 {
-			compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
-			reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
-		};
-
-		saw2: power-manager@f90a9000 {
-			compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
-			reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
-		};
-
-		saw3: power-manager@f90b9000 {
-			compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
-			reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
-		};
-
-		saw_l2: power-manager@f9012000 {
-			compatible = "qcom,apq8084-saw2-v2.1-l2", "qcom,saw2";
-			reg = <0xf9012000 0x1000>;
-		};
-
-		acc0: power-manager@f9088000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9088000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc1: power-manager@f9098000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf9098000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc2: power-manager@f90a8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90a8000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		acc3: power-manager@f90b8000 {
-			compatible = "qcom,kpss-acc-v2";
-			reg = <0xf90b8000 0x1000>,
-			      <0xf9008000 0x1000>;
-		};
-
-		restart@fc4ab000 {
-			compatible = "qcom,pshold";
-			reg = <0xfc4ab000 0x4>;
-		};
-
-		gcc: clock-controller@fc400000 {
-			compatible = "qcom,gcc-apq8084";
-			#clock-cells = <1>;
-			#reset-cells = <1>;
-			#power-domain-cells = <1>;
-			reg = <0xfc400000 0x4000>;
-			clocks = <&xo_board>,
-				 <&sleep_clk>,
-				 <0>, /* ufs */
-				 <0>,
-				 <0>,
-				 <0>,
-				 <0>, /* sata */
-				 <0>,
-				 <0>; /* pcie */
-			clock-names = "xo",
-				      "sleep_clk",
-				      "ufs_rx_symbol_0_clk_src",
-				      "ufs_rx_symbol_1_clk_src",
-				      "ufs_tx_symbol_0_clk_src",
-				      "ufs_tx_symbol_1_clk_src",
-				      "sata_asic0_clk",
-				      "sata_rx_clk",
-				      "pcie_pipe";
-		};
-
-		tcsr_mutex: hwlock@fd484000 {
-			compatible = "qcom,apq8084-tcsr-mutex", "qcom,tcsr-mutex";
-			reg = <0xfd484000 0x1000>;
-			#hwlock-cells = <1>;
-		};
-
-		rpm_msg_ram: sram@fc428000 {
-			compatible = "qcom,rpm-msg-ram";
-			reg = <0xfc428000 0x4000>;
-		};
-
-		tlmm: pinctrl@fd510000 {
-			compatible = "qcom,apq8084-pinctrl";
-			reg = <0xfd510000 0x4000>;
-			gpio-controller;
-			gpio-ranges = <&tlmm 0 0 147>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-		};
-
-		blsp2_uart2: serial@f995e000 {
-			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
-			reg = <0xf995e000 0x1000>;
-			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
-			clock-names = "core", "iface";
-			status = "disabled";
-		};
-
-		sdhc_1: mmc@f9824900 {
-			compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
-			reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-			reg-names = "hc", "core";
-			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
-				 <&gcc GCC_SDCC1_APPS_CLK>,
-				 <&xo_board>;
-			clock-names = "iface", "core", "xo";
-			status = "disabled";
-		};
-
-		sdhc_2: mmc@f98a4900 {
-			compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
-			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-			reg-names = "hc", "core";
-			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "hc_irq", "pwr_irq";
-			clocks = <&gcc GCC_SDCC2_AHB_CLK>,
-				 <&gcc GCC_SDCC2_APPS_CLK>,
-				 <&xo_board>;
-			clock-names = "iface", "core", "xo";
-			status = "disabled";
-		};
-
-		spmi_bus: spmi@fc4cf000 {
-			compatible = "qcom,spmi-pmic-arb";
-			reg-names = "core", "intr", "cnfg";
-			reg = <0xfc4cf000 0x1000>,
-			      <0xfc4cb000 0x1000>,
-			      <0xfc4ca000 0x1000>;
-			interrupt-names = "periph_irq";
-			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
-			qcom,ee = <0>;
-			qcom,channel = <0>;
-			#address-cells = <2>;
-			#size-cells = <0>;
-			interrupt-controller;
-			#interrupt-cells = <4>;
-		};
-	};
-
-	rpm: remoteproc {
-		compatible = "qcom,apq8084-rpm-proc", "qcom,rpm-proc";
-
-		smd-edge {
-			interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
-			qcom,ipc = <&apcs 8 0>;
-			qcom,smd-edge = <15>;
-
-			rpm-requests {
-				compatible = "qcom,rpm-apq8084", "qcom,smd-rpm";
-				qcom,smd-channels = "rpm_requests";
-
-				regulators-0 {
-					compatible = "qcom,rpm-pma8084-regulators";
-
-					pma8084_s1: s1 {};
-					pma8084_s2: s2 {};
-					pma8084_s3: s3 {};
-					pma8084_s4: s4 {};
-					pma8084_s5: s5 {};
-					pma8084_s6: s6 {};
-					pma8084_s7: s7 {};
-					pma8084_s8: s8 {};
-					pma8084_s9: s9 {};
-					pma8084_s10: s10 {};
-					pma8084_s11: s11 {};
-					pma8084_s12: s12 {};
-
-					pma8084_l1: l1 {};
-					pma8084_l2: l2 {};
-					pma8084_l3: l3 {};
-					pma8084_l4: l4 {};
-					pma8084_l5: l5 {};
-					pma8084_l6: l6 {};
-					pma8084_l7: l7 {};
-					pma8084_l8: l8 {};
-					pma8084_l9: l9 {};
-					pma8084_l10: l10 {};
-					pma8084_l11: l11 {};
-					pma8084_l12: l12 {};
-					pma8084_l13: l13 {};
-					pma8084_l14: l14 {};
-					pma8084_l15: l15 {};
-					pma8084_l16: l16 {};
-					pma8084_l17: l17 {};
-					pma8084_l18: l18 {};
-					pma8084_l19: l19 {};
-					pma8084_l20: l20 {};
-					pma8084_l21: l21 {};
-					pma8084_l22: l22 {};
-					pma8084_l23: l23 {};
-					pma8084_l24: l24 {};
-					pma8084_l25: l25 {};
-					pma8084_l26: l26 {};
-					pma8084_l27: l27 {};
-
-					pma8084_lvs1: lvs1 {};
-					pma8084_lvs2: lvs2 {};
-					pma8084_lvs3: lvs3 {};
-					pma8084_lvs4: lvs4 {};
-
-					pma8084_5vs1: 5vs1 {};
-				};
-			};
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
deleted file mode 100644
index 9d06255104c7..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-#include "qcom-ipq8062.dtsi"
-
-&rpm {
-	smb208_regulators: regulators {
-		compatible = "qcom,rpm-smb208-regulators";
-
-		smb208_s1a: s1a {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s1b: s1b {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2a: s2a {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2b: s2b {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
deleted file mode 100644
index 5d3ebd3e2e51..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-/ {
-	model = "Qualcomm Technologies, Inc. IPQ8062";
-	compatible = "qcom,ipq8062", "qcom,ipq8064";
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
deleted file mode 100644
index ac9c44f0c164..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-#include "qcom-ipq8064.dtsi"
-
-&rpm {
-	smb208_regulators: regulators {
-		compatible = "qcom,rpm-smb208-regulators";
-
-		smb208_s1a: s1a {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s1b: s1b {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2a: s2a {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1250000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2b: s2b {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1250000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
deleted file mode 100644
index 0442580b22de..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-&rpm {
-	smb208_regulators: regulators {
-		compatible = "qcom,rpm-smb208-regulators";
-
-		smb208_s1a: s1a {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s1b: s1b {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2a: s2a {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1250000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2b: s2b {
-			regulator-min-microvolt = < 800000>;
-			regulator-max-microvolt = <1250000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
deleted file mode 100644
index 803e6ff99ef8..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-#include "qcom-ipq8065.dtsi"
-
-&rpm {
-	smb208_regulators: regulators {
-		compatible = "qcom,rpm-smb208-regulators";
-
-		smb208_s1a: s1a {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s1b: s1b {
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1150000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2a: s2a {
-			regulator-min-microvolt = <775000>;
-			regulator-max-microvolt = <1275000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-
-		smb208_s2b: s2b {
-			regulator-min-microvolt = <775000>;
-			regulator-max-microvolt = <1275000>;
-
-			qcom,switch-mode-frequency = <1200000>;
-		};
-	};
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
deleted file mode 100644
index ea49f6cc416d..000000000000
--- a/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-/ {
-	model = "Qualcomm Technologies, Inc. IPQ8065";
-	compatible = "qcom,ipq8065", "qcom,ipq8064";
-};
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index 2a82ddce94a2..95be1d2e214f 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -1115,9 +1115,6 @@
 			reg = <0xfc380000 0x6a000>;
 			compatible = "qcom,msm8974-bimc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
-				 <&rpmcc RPM_SMD_BIMC_A_CLK>;
 		};
 
 		gcc: clock-controller@fc400000 {
@@ -1162,45 +1159,32 @@
 			reg = <0xfc460000 0x4000>;
 			compatible = "qcom,msm8974-snoc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
-				 <&rpmcc RPM_SMD_SNOC_A_CLK>;
 		};
 
 		pnoc: interconnect@fc468000 {
 			reg = <0xfc468000 0x4000>;
 			compatible = "qcom,msm8974-pnoc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
-				 <&rpmcc RPM_SMD_PNOC_A_CLK>;
 		};
 
 		ocmemnoc: interconnect@fc470000 {
 			reg = <0xfc470000 0x4000>;
 			compatible = "qcom,msm8974-ocmemnoc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
-				 <&rpmcc RPM_SMD_OCMEMGX_A_CLK>;
 		};
 
 		mmssnoc: interconnect@fc478000 {
 			reg = <0xfc478000 0x4000>;
 			compatible = "qcom,msm8974-mmssnoc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&mmcc MMSS_S0_AXI_CLK>,
-				 <&mmcc MMSS_S0_AXI_CLK>;
+			clocks = <&mmcc MMSS_S0_AXI_CLK>;
+			clock-names = "bus";
 		};
 
 		cnoc: interconnect@fc480000 {
 			reg = <0xfc480000 0x4000>;
 			compatible = "qcom,msm8974-cnoc";
 			#interconnect-cells = <1>;
-			clock-names = "bus", "bus_a";
-			clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
-				 <&rpmcc RPM_SMD_CNOC_A_CLK>;
 		};
 
 		tsens: thermal-sensor@fc4a9000 {
@@ -2223,6 +2207,7 @@
 			      <0xfec00000 0x180000>;
 			reg-names = "ctrl", "mem";
 			ranges = <0 0xfec00000 0x180000>;
+			/* core clock doesn't exist anymore, kept for ABI compliance */
 			clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
 				 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
 			clock-names = "core", "iface";