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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-04-13 18:48:43 +0400 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-05-16 19:01:52 +0400 |
| commit | 702fbb89c54e7cbc8881b9b036c139801e862d66 (patch) | |
| tree | 2220cf8f6dd4a969f7aa7d19e22b3cc97d29a099 | |
| parent | e58773268c38ac69c8998bd36bb2030d3414d630 (diff) | |
| download | linux-702fbb89c54e7cbc8881b9b036c139801e862d66.tar.xz | |
ARM: dts: imx27-pdk: Pass the FEC pin configuration
Provide an entry for the FEC pin muxing.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx27-pdk.dts | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts index e0f42133f657..430b72b5bdb8 100644 --- a/arch/arm/boot/dts/imx27-pdk.dts +++ b/arch/arm/boot/dts/imx27-pdk.dts @@ -23,6 +23,9 @@ &fec { + phy-mode = "mii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; status = "okay"; }; @@ -35,6 +38,29 @@ &iomuxc { imx27-pdk { + pinctrl_fec: fecgrp { + fsl,pins = < + MX27_PAD_SD3_CMD__FEC_TXD0 0x0 + MX27_PAD_SD3_CLK__FEC_TXD1 0x0 + MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 + MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 + MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 + MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 + MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 + MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 + MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 + MX27_PAD_ATA_DATA7__FEC_MDC 0x0 + MX27_PAD_ATA_DATA8__FEC_CRS 0x0 + MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 + MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 + MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 + MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 + MX27_PAD_ATA_DATA13__FEC_COL 0x0 + MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 + MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX27_PAD_UART1_TXD__UART1_TXD 0x0 |