diff options
| author | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-10-17 15:35:02 +0300 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-10-18 05:11:21 +0300 |
| commit | 69d640edc2630d903f25ab8ff8bf7d96d0776ce2 (patch) | |
| tree | 09c3eb6ebed4b59e1705a581f4de541de943ebee | |
| parent | 52ecd48b8d3f5206049758d95ca5b291397b3209 (diff) | |
| download | linux-69d640edc2630d903f25ab8ff8bf7d96d0776ce2.tar.xz | |
drm/i915/dp: Check if guardband can accommodate sdp latencies
Check if guardband is sufficient for all DP SDP latencies.
If its not, fail .compute_config_late().
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20251017123504.2247954-4-ankit.k.nautiyal@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9441ef685200..b0aeb6c2de86 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -93,6 +93,7 @@ #include "intel_psr.h" #include "intel_quirks.h" #include "intel_tc.h" +#include "intel_vblank.h" #include "intel_vdsc.h" #include "intel_vrr.h" @@ -6992,14 +6993,35 @@ void intel_dp_mst_resume(struct intel_display *display) } } +static +int intel_dp_sdp_compute_config_late(struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + int guardband = intel_crtc_vblank_length(crtc_state); + int min_sdp_guardband = intel_dp_sdp_min_guardband(crtc_state, false); + + if (guardband < min_sdp_guardband) { + drm_dbg_kms(display->drm, "guardband %d < min sdp guardband %d\n", + guardband, min_sdp_guardband); + return -EINVAL; + } + + return 0; +} + int intel_dp_compute_config_late(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + int ret; intel_psr_compute_config_late(intel_dp, crtc_state); + ret = intel_dp_sdp_compute_config_late(crtc_state); + if (ret) + return ret; + return 0; } |
