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authorJerome Brunet <jbrunet@baylibre.com>2026-01-14 20:08:48 +0300
committerNeil Armstrong <neil.armstrong@linaro.org>2026-01-15 11:04:25 +0300
commit69330fd2368371c4eb47d60ace6bca09763d24a0 (patch)
treec7f011d009770a0df2b0c609a828876a7f5ff621
parent3a115d42922cffc91b303992eadf220111d66c31 (diff)
downloadlinux-69330fd2368371c4eb47d60ace6bca09763d24a0.tar.xz
arm64: dts: amlogic: c3: assign the MMC signal clocks
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz. Assign the clocks to make sure they are properly configured Fixes: 520b792e8317 ("arm64: dts: amlogic: add some device nodes for C3") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260114-amlogic-mmc-clocks-followup-v1-1-a999fafbe0aa@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-rw-r--r--arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index 11e5323f95b7..4e6757a57fb9 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -969,6 +969,10 @@
no-sd;
resets = <&reset RESET_SD_EMMC_A>;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>;
+ assigned-clock-rates = <24000000>;
+
};
sd: mmc@8a000 {
@@ -984,6 +988,9 @@
no-sdio;
resets = <&reset RESET_SD_EMMC_B>;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>;
+ assigned-clock-rates = <24000000>;
};
nand: nand-controller@8d000 {