diff options
| author | Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> | 2025-03-06 21:11:14 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-05-02 03:54:03 +0300 |
| commit | 60b8d3a2365a30aadd514aaf571c6baecd9885ba (patch) | |
| tree | 05b2c641f9bd41db78ca6294c30a19743e348c53 | |
| parent | 98a8920e7b07641eb1996b3c39b9ce27fc05dbb9 (diff) | |
| download | linux-60b8d3a2365a30aadd514aaf571c6baecd9885ba.tar.xz | |
dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path
There's a separate path that allows register access from CPUSS.
Describe it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/641464/
Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-2-0c84aceb0ef9@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
| -rw-r--r-- | Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml index 163fc83c1e80..3733d8cd2ae0 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml @@ -38,12 +38,16 @@ properties: maxItems: 1 interconnects: - maxItems: 2 + items: + - description: Interconnect path from the MDP0 port to the data bus + - description: Interconnect path from the MDP1 port to the data bus + - description: Interconnect path from the CPU to the reg bus interconnect-names: items: - const: mdp0-mem - const: mdp1-mem + - const: cpu-cfg patternProperties: "^display-controller@[0-9a-f]+$": |