diff options
| author | Rudraksha Gupta <guptarud@gmail.com> | 2025-02-14 09:28:39 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-03-14 00:39:24 +0300 |
| commit | 5ee449c75f49c9a6b0cbff7848f922183e7888c1 (patch) | |
| tree | 0e77e99f8552a3d4270149dd10f263e491aa75bd | |
| parent | adbbdcf4b2d6556721b580385ba387baca5c26ee (diff) | |
| download | linux-5ee449c75f49c9a6b0cbff7848f922183e7888c1.tar.xz | |
ARM: dts: qcom: msm8960: Add BAM
Copy bam nodes from qcom-ipq8064.dtsi and change
the reg values to match msm8960.
Co-developed-by: Sam Day <me@samcday.com>
Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250213-expressatt-bam-v3-1-0ff338f488b2@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index 865fe7cc3951..1a98a4a9a586 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -279,7 +279,7 @@ compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; status = "disabled"; - reg = <0x12180000 0x8000>; + reg = <0x12180000 0x2000>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; clock-names = "mclk", "apb_pclk"; @@ -289,13 +289,25 @@ max-frequency = <192000000>; no-1-8-v; vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; + dma-names = "tx", "rx"; + }; + + sdcc3bam: dma-controller@12182000 { + compatible = "qcom,bam-v1.3.0"; + reg = <0x12182000 0x4000>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc SDC3_H_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; }; sdcc1: mmc@12400000 { status = "disabled"; compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x8000>; + reg = <0x12400000 0x2000>; interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; @@ -305,6 +317,18 @@ cap-sd-highspeed; cap-mmc-highspeed; vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; + }; + + sdcc1bam: dma-controller@12402000 { + compatible = "qcom,bam-v1.3.0"; + reg = <0x12402000 0x4000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc SDC1_H_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; }; tcsr: syscon@1a400000 { |