diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-04-10 20:41:01 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-04-11 13:53:53 +0300 |
| commit | 5e75c1d4d386fb7d64e2b19355e4d38dd4fd8845 (patch) | |
| tree | cf3d8641bfc4b162b8daeaf80ec94aadec10801b | |
| parent | ab00febad191d7a4400aa1c3468279fb508258d4 (diff) | |
| download | linux-5e75c1d4d386fb7d64e2b19355e4d38dd4fd8845.tar.xz | |
spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
I got mislead while analyzing the driver by the fact that the second
opcode byte was in all cases smashed:
if (op->cmd.dtr)
opcode = op->cmd.opcode >> 8;
else
opcode = op->cmd.opcode;
While at a first glance this doesn't let a chance to the second byte to
be shifted out on the bus, this is actually the second step of an
initialization, where the byte being apparently "ignored" in DTR mode
has already been written in a dedicated "extended opcode" register. As
such, the comment and the extra check that I proposed were entirely
wrong, remove them.
Fixes: bee085476d27 ("spi: cadence-qspi: Make sure we filter out unsupported ops")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20260410-winbond-6-19-rc1-oddr-v1-1-2ac4827a3868@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-cadence-quadspi.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 2ead419e896e..b6f7f95e8bd3 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1544,10 +1544,6 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem, if (op->data.nbytes && op->data.buswidth != 8) return false; - /* A single opcode is supported, it will be repeated */ - if ((op->cmd.opcode >> 8) != (op->cmd.opcode & 0xFF)) - return false; - if (cqspi->is_rzn1) return false; } else if (!all_false) { |