diff options
| author | Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> | 2025-11-26 16:03:56 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-01-09 13:46:49 +0300 |
| commit | 5c4c34ea8dc02350fad11bc5423ca065595bbd54 (patch) | |
| tree | 5e71cfc6a380720abbd9c50ce503ad94448c3705 | |
| parent | aea73cb10ec5bf8e24ff688eba8aeb9c7d1b4cd0 (diff) | |
| download | linux-5c4c34ea8dc02350fad11bc5423ca065595bbd54.tar.xz | |
arm64: dts: renesas: r9a09g087: Add TSU and thermal zones support
The Renesas RZ/N2H (R9A09G087) SoC includes a Temperature Sensor Unit
(TSU). The device provides real-time temperature measurements for
thermal management, utilizing a single dedicated channel for temperature
sensing.
The TSU loads calibration data via SMC SIP.
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251126130356.2768625-10-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi index a6a558e0ccd9..804970bf745f 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -36,6 +36,7 @@ next-level-cache = <&L3_CA55>; enable-method = "psci"; clocks = <&cpg CPG_CORE R9A09G087_CLK_CA55C0>; + #cooling-cells = <2>; operating-points-v2 = <&cluster0_opp>; }; @@ -46,6 +47,7 @@ next-level-cache = <&L3_CA55>; enable-method = "psci"; clocks = <&cpg CPG_CORE R9A09G087_CLK_CA55C1>; + #cooling-cells = <2>; operating-points-v2 = <&cluster0_opp>; }; @@ -56,6 +58,7 @@ next-level-cache = <&L3_CA55>; enable-method = "psci"; clocks = <&cpg CPG_CORE R9A09G087_CLK_CA55C2>; + #cooling-cells = <2>; operating-points-v2 = <&cluster0_opp>; }; @@ -66,6 +69,7 @@ next-level-cache = <&L3_CA55>; enable-method = "psci"; clocks = <&cpg CPG_CORE R9A09G087_CLK_CA55C3>; + #cooling-cells = <2>; operating-points-v2 = <&cluster0_opp>; }; @@ -316,6 +320,17 @@ status = "disabled"; }; + tsu: thermal@80086000 { + compatible = "renesas,r9a09g087-tsu", "renesas,r9a09g077-tsu"; + reg = <0 0x80086000 0 0x1000>; + interrupts = <GIC_SPI 713 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "adi", "adcmpi"; + clocks = <&cpg CPG_MOD 307>; + power-domains = <&cpg>; + #thermal-sensor-cells = <0>; + }; + i2c0: i2c@80088000 { compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077"; reg = <0 0x80088000 0 0x400>; @@ -1197,6 +1212,37 @@ snps,blen = <16 8 4 0 0 0 0>; }; + thermal-zones { + cpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&tsu>; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 0 1>, <&cpu1 0 1>, + <&cpu2 0 1>, <&cpu3 0 1>; + contribution = <1024>; + }; + }; + + trips { + target: trip-point { + temperature = <95000>; + hysteresis = <1000>; + type = "passive"; + }; + + sensor_crit: sensor-crit { + temperature = <120000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, |