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authorMarc Zyngier <maz@kernel.org>2026-01-08 20:32:32 +0300
committerMarc Zyngier <maz@kernel.org>2026-01-15 14:58:57 +0300
commit592dc2c020686536dae1c427c78cf558a3df4414 (patch)
tree7543af865dde48335adc70e0e618b027b044355c
parente5d40a5a97c1d57e89aa5f324734065c6580b436 (diff)
downloadlinux-592dc2c020686536dae1c427c78cf558a3df4414.tar.xz
KVM: arm64: pkvm: Report optional ID register traps with a 0x18 syndrome
With FEAT_IDST, unimplemented system registers in the feature ID space must be reported using EC=0x18 at the closest handling EL, rather than with an UNDEF. Most of these system registers are always implemented thanks to their dependency on FEAT_AA64, except for a set of (currently) three registers: GMID_EL1 (depending on MTE2), CCSIDR2_EL1 (depending on FEAT_CCIDX), and SMIDR_EL1 (depending on SME). For these three registers, report their trap as EC=0x18 if they end-up trapping into KVM and that FEAT_IDST is implemented in the guest. Otherwise, just make them UNDEF. Link: https://patch.msgid.link/20260108173233.2911955-9-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
-rw-r--r--arch/arm64/kvm/hyp/nvhe/sys_regs.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
index b197f3eb272c..06d28621722e 100644
--- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
+++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
@@ -347,6 +347,18 @@ static bool pvm_gic_read_sre(struct kvm_vcpu *vcpu,
return true;
}
+static bool pvm_idst_access(struct kvm_vcpu *vcpu,
+ struct sys_reg_params *p,
+ const struct sys_reg_desc *r)
+{
+ if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))
+ inject_sync64(vcpu, kvm_vcpu_get_esr(vcpu));
+ else
+ inject_undef64(vcpu);
+
+ return false;
+}
+
/* Mark the specified system register as an AArch32 feature id register. */
#define AARCH32(REG) { SYS_DESC(REG), .access = pvm_access_id_aarch32 }
@@ -477,6 +489,9 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {
HOST_HANDLED(SYS_CCSIDR_EL1),
HOST_HANDLED(SYS_CLIDR_EL1),
+ { SYS_DESC(SYS_CCSIDR2_EL1), .access = pvm_idst_access },
+ { SYS_DESC(SYS_GMID_EL1), .access = pvm_idst_access },
+ { SYS_DESC(SYS_SMIDR_EL1), .access = pvm_idst_access },
HOST_HANDLED(SYS_AIDR_EL1),
HOST_HANDLED(SYS_CSSELR_EL1),
HOST_HANDLED(SYS_CTR_EL0),