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| author | Hrushikesh Salunke <h-salunke@ti.com> | 2025-10-17 11:46:54 +0300 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2025-11-03 12:03:59 +0300 |
| commit | 56bf2702cab02d6781c6201fc407be356bb256fd (patch) | |
| tree | d8b45e480381e70df97e99f9607560a92c17bbd1 | |
| parent | cadd9234aedc9d4c5b4342f96a1ebe02314adeb2 (diff) | |
| download | linux-56bf2702cab02d6781c6201fc407be356bb256fd.tar.xz | |
arm64: dts: ti: k3-j784s4-j742s2-evm-common: Add bootph-all tag to "pcie1_ctrl"
J784S4 SoC has two instances of PCIe which are PCIe0 and PCIe1. J784S4
SoC uses PCIe1 instance for PCIe boot process. To configure PCIe1 at
all boot stages "pcie1_ctrl" also needs to be present at all boot
stages. Thus add the "bootph-all" boot phase tag to "pcie1_ctrl" device
tree node.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Link: https://patch.msgid.link/20251017084654.2929945-4-h-salunke@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index ed5146b69d56..b9d1d3769a54 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -985,6 +985,10 @@ <&k3_clks 218 22>; }; +&pcie1_ctrl { + bootph-all; +}; + &serdes_ln_ctrl { bootph-all; }; |