diff options
| author | Xianwei Zhao <xianwei.zhao@amlogic.com> | 2026-05-08 10:36:54 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-05-11 16:22:48 +0300 |
| commit | 5363b67ac8ebcc3e227dbf59fc8061949109841d (patch) | |
| tree | 1d3590af65d55c20dc6f248eb6bcb32baf3bf929 | |
| parent | 0fa10fb77069fb67aa51384868ef3702b7791465 (diff) | |
| download | linux-5363b67ac8ebcc3e227dbf59fc8061949109841d.tar.xz | |
irqchip/meson-gpio: Use the correct register in meson_s4_gpio_irq_set_type()
meson_s4_gpio_irq_set_type() uses the both-edge trigger register for
configuring level type and single edge mode interrupts, which is not
correct.
Use REG_EDGE_POL instead.
Fixes: bbd6fcc76b39 ("irqchip: Add support for Amlogic A4 and A5 SoCs")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260508-a9-gpio-irqchip-v1-1-9dc5f3e022e0@amlogic.com
| -rw-r--r-- | drivers/irqchip/irq-meson-gpio.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c index f722e9c57e2e..74a376ef452e 100644 --- a/drivers/irqchip/irq-meson-gpio.c +++ b/drivers/irqchip/irq-meson-gpio.c @@ -415,8 +415,7 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) val |= BIT(ctl->params->edge_single_offset + idx); - meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, - BIT(idx) | BIT(12 + idx), val); + meson_gpio_irq_update_bits(ctl, REG_EDGE_POL, BIT(idx) | BIT(12 + idx), val); return 0; }; |