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authorBoris Brezillon <bbrezillon@kernel.org>2020-05-03 18:53:34 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-05-11 10:51:41 +0300
commit5338ef99c951483fb38dc537e3f7d74aebdab087 (patch)
tree99f5a8a2f27fd4ee08ad2588db8173f552062eb7
parent51b71ac092eaf3597210b64255040071db1c10e2 (diff)
downloadlinux-5338ef99c951483fb38dc537e3f7d74aebdab087.tar.xz
mtd: rawnand: toshiba: Add a specific init for TC58TEG5DCLTA00
TC58TEG5DCLTA00 is an MLC NAND which requires scrambling and supports SDR timings mode 5. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-2-miquel.raynal@bootlin.com
-rw-r--r--drivers/mtd/nand/raw/nand_toshiba.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index f3dcd695b5db..6b887ce20f30 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -194,6 +194,14 @@ static void toshiba_nand_decode_id(struct nand_chip *chip)
}
}
+static int tc58teg5dclta00_init(struct nand_chip *chip)
+{
+ chip->onfi_timing_mode_default = 5;
+ chip->options |= NAND_NEED_SCRAMBLING;
+
+ return 0;
+}
+
static int toshiba_nand_init(struct nand_chip *chip)
{
if (nand_is_slc(chip))
@@ -204,6 +212,9 @@ static int toshiba_nand_init(struct nand_chip *chip)
chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND)
toshiba_nand_benand_init(chip);
+ if (!strcmp("TC58TEG5DCLTA00", chip->parameters.model))
+ tc58teg5dclta00_init(chip);
+
return 0;
}