diff options
| author | Lancelot Six <lancelot.six@amd.com> | 2026-01-16 23:30:27 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-01-21 22:24:14 +0300 |
| commit | 532e2c87d428d2dc18152f004c59be15281310bc (patch) | |
| tree | ad037c48e447828e7d625a3bd260da294bbb8d2d | |
| parent | cf818707b543687f7cf99180ae0d218bab9a3205 (diff) | |
| download | linux-532e2c87d428d2dc18152f004c59be15281310bc.tar.xz | |
drm/amdkfd: Do not include VGPR MSBs in saved PC during save
The current trap handler uses the top bits of ttmp1 to store a copy of
sq_wave_mode.*vgpr_msb (except for src2_vgpr_msb). This is so the
effective values in sq_wave_mode can be cleared to ensure correct
behavior of the trap handler.
When saving sq_wave_mode, the trap handler correctly rebuilds the
expected value (with *vgpr_msb restored), so the save area is correct.
However, the PC itself is copied from ttmp[0:1], which contains the
wave's PC as well as the saved MSBs.
The debugger reads the PC from the save area and is confused when non-0
values from VGPR_MSBs are present.
This patch fixes this by saving the PC in the save area's PC slot, not
the composite of the PC and VGPR_MSBs. On restore, the VGPR_MSBs are
restored from sq_wave_mode.
Signed-off-by: Lancelot Six <lancelot.six@amd.com>
Tested-by: Alexey Kondratiev <Alexey.Kondratiev@amd.com>
Reviewed-by: Jay Cornwall <jay.cornwall@amd.com>
Cc: Vladimir Indic <vladimir.indic@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h index 9bb7fb6a83ed..39bdc98b8b6d 100644 --- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h +++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h @@ -3760,8 +3760,8 @@ static const uint32_t cwsr_trap_gfx12_hex[] = { 0xb8faf804, 0x8b7a847a, 0x91788478, 0x8c787a78, 0xd7610002, 0x0000fa6c, - 0x807d817d, 0x917aff6d, - 0x80000000, 0xd7610002, + 0x807d817d, 0x8b7aff6d, + 0x0000ffff, 0xd7610002, 0x0000fa7a, 0x807d817d, 0xd7610002, 0x0000fa6e, 0x807d817d, 0xd7610002, @@ -4848,7 +4848,7 @@ static const uint32_t cwsr_trap_gfx12_1_0_hex[] = { 0x9178ff78, 0x0001000c, 0x8c787a78, 0xd7610002, 0x0000fa6c, 0x807d817d, - 0x917aff6d, 0x80000000, + 0x8b7aff6d, 0x01ffffff, 0xd7610002, 0x0000fa7a, 0x807d817d, 0xd7610002, 0x0000fa6e, 0x807d817d, diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm index c25f16e66a27..b1b1d15bb1e7 100644 --- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm +++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm @@ -547,7 +547,7 @@ L_SAVE_HWREG: s_or_b32 s_save_state_priv, s_save_state_priv, s_save_tmp write_hwreg_to_v2(s_save_pc_lo) - s_andn2_b32 s_save_tmp, s_save_pc_hi, S_SAVE_PC_HI_FIRST_WAVE_MASK + s_and_b32 s_save_tmp, s_save_pc_hi, ADDRESS_HI32_MASK write_hwreg_to_v2(s_save_tmp) write_hwreg_to_v2(s_save_exec_lo) #if WAVE32_ONLY |