diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2025-04-07 19:51:56 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-04-22 12:27:12 +0300 |
| commit | 52239ebe624016d01b3bf8a3a8510dfd57f56b21 (patch) | |
| tree | 34048d2abc1299884f036153d3c85a50edfaf3d3 | |
| parent | 6e1c795071359dc36e26ed96a271e06687d84f74 (diff) | |
| download | linux-52239ebe624016d01b3bf8a3a8510dfd57f56b21.tar.xz | |
clk: renesas: rzv2h: Support static dividers without RMW
Add support for static dividers that do not require read-modify-write
(RMW) operations. This enables the use of the generic clk_divider_ops
instead of the custom RMW-based implementation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Co-developed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250407165202.197570-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/rzv2h-cpg.c | 5 | ||||
| -rw-r--r-- | drivers/clk/renesas/rzv2h-cpg.h | 12 |
2 files changed, 16 insertions, 1 deletions
diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c index eefa31c162d4..020f30fb3d8d 100644 --- a/drivers/clk/renesas/rzv2h-cpg.c +++ b/drivers/clk/renesas/rzv2h-cpg.c @@ -374,7 +374,10 @@ rzv2h_cpg_ddiv_clk_register(const struct cpg_core_clk *core, return ERR_PTR(-ENOMEM); init.name = core->name; - init.ops = &rzv2h_ddiv_clk_divider_ops; + if (cfg_ddiv.no_rmw) + init.ops = &clk_divider_ops; + else + init.ops = &rzv2h_ddiv_clk_divider_ops; init.parent_names = &parent_name; init.num_parents = 1; diff --git a/drivers/clk/renesas/rzv2h-cpg.h b/drivers/clk/renesas/rzv2h-cpg.h index 5e9295d31093..449f8c82e8fb 100644 --- a/drivers/clk/renesas/rzv2h-cpg.h +++ b/drivers/clk/renesas/rzv2h-cpg.h @@ -37,12 +37,15 @@ struct pll { * @shift: position of the divider bit * @width: width of the divider * @monbit: monitor bit in CPG_CLKSTATUS0 register + * @no_rmw: flag to indicate if the register is read-modify-write + * (1: no RMW, 0: RMW) */ struct ddiv { unsigned int offset:11; unsigned int shift:4; unsigned int width:4; unsigned int monbit:5; + unsigned int no_rmw:1; }; /* @@ -61,6 +64,15 @@ struct ddiv { .monbit = _monbit \ }) +#define DDIV_PACK_NO_RMW(_offset, _shift, _width, _monbit) \ + ((struct ddiv){ \ + .offset = (_offset), \ + .shift = (_shift), \ + .width = (_width), \ + .monbit = (_monbit), \ + .no_rmw = 1 \ + }) + /** * struct smuxed - Structure for static muxed clocks * |