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| author | Etienne Carriere <etienne.carriere@foss.st.com> | 2024-05-21 11:01:31 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-06-05 10:06:39 +0300 |
| commit | 4fbf92d51cbc8c5d2d4ea1fcfad4cd8365047f4d (patch) | |
| tree | 337ba1616b28b66604e0f5631ee8f593c7e25eb5 | |
| parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) | |
| download | linux-4fbf92d51cbc8c5d2d4ea1fcfad4cd8365047f4d.tar.xz | |
arm64: dts: st: OP-TEE async notif on PPI 15 for stm32mp25
Define GIC PPI 15 (aka GIC interrupt line 31) for OP-TEE asynchronous
notification.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/st/stm32mp253.dtsi | 4 |
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index dcd0656d67a8..22a5379ea1c9 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -51,9 +51,11 @@ }; firmware { - optee { + optee: optee { compatible = "linaro,optee-tz"; method = "smc"; + interrupt-parent = <&intc>; + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; scmi { diff --git a/arch/arm64/boot/dts/st/stm32mp253.dtsi b/arch/arm64/boot/dts/st/stm32mp253.dtsi index 029f88981961..69001f924d17 100644 --- a/arch/arm64/boot/dts/st/stm32mp253.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp253.dtsi @@ -28,3 +28,7 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; }; + +&optee { + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; +}; |