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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-07-24 11:38:55 +0300 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2025-09-12 17:02:52 +0300 |
| commit | 4f6a808b36eb4cb1cfde4c46be8c64653c606d00 (patch) | |
| tree | d86ab955417ce98f659c304b24de6cceeb06c94d | |
| parent | 50dd9ea91de1c0fa23a91ac9850f01c8d4e44172 (diff) | |
| download | linux-4f6a808b36eb4cb1cfde4c46be8c64653c606d00.tar.xz | |
arm64: dts: mediatek: mt6795: Add mediatek,infracfg to iommu node
The "M4U" IOMMU requires a handle to the infracfg to switch to
the 4gb/pae addressing mode: add it.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Fei Shao <fshao@chromium.org>
Link: https://lore.kernel.org/r/20250724083914.61351-20-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt6795.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index e5e269a660b1..38f65aad2802 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -427,6 +427,7 @@ clocks = <&infracfg CLK_INFRA_M4U>; clock-names = "bclk"; interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_LOW>; + mediatek,infracfg = <&infracfg>; mediatek,larbs = <&larb0 &larb1 &larb2 &larb3>; power-domains = <&spm MT6795_POWER_DOMAIN_MM>; #iommu-cells = <1>; |