diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-05-23 12:33:39 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-06-16 03:24:13 +0300 |
| commit | 4d352eb91a42bf62a6560d7926bc5cdc98d010eb (patch) | |
| tree | 99f76e8651e7edc84ae849b9232484f2046ad853 | |
| parent | b27a604a5793100e17b4979df08fcc238cac4c9c (diff) | |
| download | linux-4d352eb91a42bf62a6560d7926bc5cdc98d010eb.tar.xz | |
dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195
We will use the infra_ao reset which is defined in mt8192-sys-clock
and mt8195-sys-clock.
The value of reset-cells is 1.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-13-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml | 3 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml index 5705bcf1fe47..27f79175c678 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml @@ -29,6 +29,9 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml index 57a1503d95fe..95b6bdf99936 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml @@ -37,6 +37,9 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + required: - compatible - reg |