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| author | Zhen Lei <thunder.leizhen@huawei.com> | 2021-01-18 06:16:29 +0300 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2021-01-29 11:33:24 +0300 |
| commit | 47a6ca1172cb516b2a99f4b84ee1491859807390 (patch) | |
| tree | 97c0f3d1f06483c6bf5c3795c84d006f66b2e638 | |
| parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
| download | linux-47a6ca1172cb516b2a99f4b84ee1491859807390.tar.xz | |
arm64: dts: hisilicon: separate each group of data in the property "ranges"
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip06.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip07.dtsi | 4 |
3 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index 81d09434c5c6..16e11fde3ed9 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -565,8 +565,8 @@ device_type = "pci"; bus-range = <0x00 0xff>; num-lanes = <1>; - ranges = <0x81000000 0x0 0x00000000 0x4f00000 0x0 0x100000 - 0x82000000 0x0 0x3000000 0x3000000 0x0 0x01f00000>; + ranges = <0x81000000 0x0 0x00000000 0x4f00000 0x0 0x100000>, + <0x82000000 0x0 0x3000000 0x3000000 0x0 0x01f00000>; interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; #interrupt-cells = <1>; diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi index 7980709e21ff..78050d67a786 100644 --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi @@ -737,9 +737,8 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0 - 0x5ff0000 0x01000000 0 0 0 0xb7ff0000 - 0 0x10000>; + ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0 0x5ff0000>, + <0x01000000 0 0 0 0xb7ff0000 0 0x10000>; #interrupt-cells = <1>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4 diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi index 7832d9cdec21..f477f442c275 100644 --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi @@ -1708,8 +1708,8 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - ranges = <0x02000000 0 0xa8000000 0 0xa8000000 0 0x77f0000 - 0x01000000 0 0 0 0xaf7f0000 0 0x10000>; + ranges = <0x02000000 0 0xa8000000 0 0xa8000000 0 0x77f0000>, + <0x01000000 0 0 0 0xaf7f0000 0 0x10000>; #interrupt-cells = <1>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4 |