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| author | Richard Zhu <hongxing.zhu@nxp.com> | 2025-10-15 06:04:21 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-11-12 04:51:28 +0300 |
| commit | 45b68efd9bb52d18075f9440dddb3705b72d5810 (patch) | |
| tree | 773f4f9295da6bb58ae3a5cc983f402437840dc3 | |
| parent | 798825c11e12a63b43a92b794dc157d966475b2b (diff) | |
| download | linux-45b68efd9bb52d18075f9440dddb3705b72d5810.tar.xz | |
arm64: dts: imx8mp-evk: Add supports-clkreq property to PCIe M.2 port
According to PCIe r6.1, sec 5.5.1.
The following rules define how the L1.1 and L1.2 substates are entered:
Both the Upstream and Downstream Ports must monitor the logical state of
the CLKREQ# signal.
Typical implement is using open drain, which connect RC's clkreq# to
EP's clkreq# together and pull up clkreq#.
imx8mp-evk matches this requirement, so add supports-clkreq to allow
PCIe device enter ASPM L1 Sub-State.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 3730792daf50..523bf4aeff31 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -710,6 +710,7 @@ pinctrl-0 = <&pinctrl_pcie0>; reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie0>; + supports-clkreq; status = "okay"; }; |