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authorRichard Zhu <hongxing.zhu@nxp.com>2025-10-15 06:04:23 +0300
committerShawn Guo <shawnguo@kernel.org>2025-11-12 04:51:29 +0300
commit44f9bcc943f53e25f63becbb471f0909fe77b603 (patch)
tree54e47787b5a7d1d1feb16f18e902a93d44fe8ee9
parent053ee55576cec9a94a16680a266f242df1872eb9 (diff)
downloadlinux-44f9bcc943f53e25f63becbb471f0909fe77b603.tar.xz
arm64: dts: imx8qm-mek: Add supports-clkreq property to PCIe M.2 port
According to PCIe r6.1, sec 5.5.1. The following rules define how the L1.1 and L1.2 substates are entered: Both the Upstream and Downstream Ports must monitor the logical state of the CLKREQ# signal. Typical implement is using open drain, which connect RC's clkreq# to EP's clkreq# together and pull up clkreq#. imx8qm-mek matches this requirement, so add supports-clkreq to allow PCIe device enter ASPM L1 Sub-State. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-mek.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 6a75ec612684..0bf2ee33618e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -784,6 +784,7 @@
pinctrl-names = "default";
reset-gpio = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pciea>;
+ supports-clkreq;
status = "okay";
};