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| author | Richard Zhu <hongxing.zhu@nxp.com> | 2025-12-11 09:48:18 +0300 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2025-12-23 15:32:35 +0300 |
| commit | 418970983059aa06302ddd5ca76d441973b537c1 (patch) | |
| tree | 90d8498a474baad6805b9a10f26ec9974177dbbd | |
| parent | 8f0b4cce4481fb22653697cced8d0d04027cb1e8 (diff) | |
| download | linux-418970983059aa06302ddd5ca76d441973b537c1.tar.xz | |
dt-bindings: PCI: dwc: Add external reference clock input
Add external reference clock input "extref" for a reference clock that
comes from external crystal oscillator.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251211064821.2707001-2-hongxing.zhu@nxp.com
| -rw-r--r-- | Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index 6339a76499b2..2c4dc04f9984 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -106,6 +106,12 @@ properties: be connected to a single source of the periodic signal). const: ref - description: + Some dwc wrappers (like i.MX95 PCIes) have two reference clock + inputs, one from an internal PLL, the other from an off-chip crystal + oscillator. If present, 'extref' refers to a reference clock from + an external oscillator. + const: extref + - description: Clock for the PHY registers interface. Originally this is a PHY-viewport-based interface, but some platform may have specifically designed one. |