diff options
| author | Thierry Reding <treding@nvidia.com> | 2025-02-03 18:27:02 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2026-05-28 23:46:26 +0300 |
| commit | 3ef27f1ad5ed0e36c2dac82876ef7dde33a588f2 (patch) | |
| tree | 9de986aa4ca5526f98e95856c084b7ef72b3ae85 | |
| parent | 64e609f9299d457a88dec0bce68b42a434a78502 (diff) | |
| download | linux-3ef27f1ad5ed0e36c2dac82876ef7dde33a588f2.tar.xz | |
drm/nouveau: tegra: Explicitly specify PMC instance to use
Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.
Acked-by: Danilo Krummrich <dakr@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h index 57bc542780bb..6aaa30ef167f 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h @@ -18,6 +18,8 @@ struct nvkm_device_tegra { struct regulator *vdd; + struct tegra_pmc *pmc; + struct { /* * Protects accesses to mm from subsystems diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 46bb55a1f565..3c8d0878891a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -54,7 +54,8 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) reset_control_assert(tdev->rst); udelay(10); - ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + ret = tegra_pmc_powergate_remove_clamping(tdev->pmc, + TEGRA_POWERGATE_3D); if (ret) goto err_clamp; udelay(10); @@ -307,6 +308,12 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, goto free; } + tdev->pmc = devm_tegra_pmc_get(&pdev->dev); + if (IS_ERR(tdev->pmc)) { + ret = PTR_ERR(tdev->pmc); + goto free; + } + /** * The IOMMU bit defines the upper limit of the GPU-addressable space. */ |