diff options
| author | Vasily Khoruzhick <anarsoul@gmail.com> | 2025-03-18 21:18:51 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-04-26 23:50:44 +0300 |
| commit | 3cb09de48f652abd662b436b23f914d3eb66f1fd (patch) | |
| tree | 10b1061c6502b9869631170dff272af52a6939c7 | |
| parent | 646bfc52bbe184c0579060c3919e5d70885b0dcc (diff) | |
| download | linux-3cb09de48f652abd662b436b23f914d3eb66f1fd.tar.xz | |
clk: rockchip: rk3568: Add PLL rate for 33.3MHz
Add PLL rate for 33.3 MHz to allow BTT HDMI5 screen to run at its native
mode of 800x480
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Link: https://lore.kernel.org/r/20250318181930.1178256-1-anarsoul@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3568.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index 7d9279291e76..ed2fb08bd39d 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -89,6 +89,7 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = { RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0), RK3036_PLL_RATE(78750000, 4, 315, 6, 4, 1, 0), RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0), + RK3036_PLL_RATE(33300000, 4, 111, 5, 4, 1, 0), { /* sentinel */ }, }; |