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| author | Yixun Lan <dlan@gentoo.org> | 2025-04-24 10:48:09 +0300 |
|---|---|---|
| committer | Yixun Lan <dlan@gentoo.org> | 2025-05-14 06:43:51 +0300 |
| commit | 3b2802c2d665bcdcb176f8da894198a0654a317a (patch) | |
| tree | 195cd17a651c111194b5250302c109da49685417 | |
| parent | c4f3c45a47936da478f31f0975bc7ef2b98a9a9a (diff) | |
| download | linux-3b2802c2d665bcdcb176f8da894198a0654a317a.tar.xz | |
riscv: dts: spacemit: Acquire clocks for UART
The K1 SoC features two clocks for UART controller, Acquire them
explicitly in the driver. Also it is required to remove the
clock-frequency properties from the uart node, otherwise the new
clock properties are ignored by of_platform_serial_setup() in "8250_of.c".
Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Link: https://lore.kernel.org/r/20250424-05-dts-clock-v2-2-17d83a705c4c@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
| -rw-r--r-- | arch/riscv/boot/dts/spacemit/k1.dtsi | 36 |
1 files changed, 27 insertions, 9 deletions
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index 6f3d100781f5..2c7aa9b37fee 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -360,8 +360,10 @@ uart0: serial@d4017000 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017000 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART0>, + <&syscon_apbc CLK_UART0_BUS>; + clock-names = "core", "bus"; interrupts = <42>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -370,8 +372,10 @@ uart2: serial@d4017100 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017100 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART2>, + <&syscon_apbc CLK_UART2_BUS>; + clock-names = "core", "bus"; interrupts = <44>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -380,8 +384,10 @@ uart3: serial@d4017200 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017200 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART3>, + <&syscon_apbc CLK_UART3_BUS>; + clock-names = "core", "bus"; interrupts = <45>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -390,8 +396,10 @@ uart4: serial@d4017300 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017300 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART4>, + <&syscon_apbc CLK_UART4_BUS>; + clock-names = "core", "bus"; interrupts = <46>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -400,8 +408,10 @@ uart5: serial@d4017400 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017400 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART5>, + <&syscon_apbc CLK_UART5_BUS>; + clock-names = "core", "bus"; interrupts = <47>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -410,8 +420,10 @@ uart6: serial@d4017500 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017500 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART6>, + <&syscon_apbc CLK_UART6_BUS>; + clock-names = "core", "bus"; interrupts = <48>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -420,8 +432,10 @@ uart7: serial@d4017600 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017600 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART7>, + <&syscon_apbc CLK_UART7_BUS>; + clock-names = "core", "bus"; interrupts = <49>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -430,8 +444,10 @@ uart8: serial@d4017700 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017700 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART8>, + <&syscon_apbc CLK_UART8_BUS>; + clock-names = "core", "bus"; interrupts = <50>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -440,8 +456,10 @@ uart9: serial@d4017800 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xd4017800 0x0 0x100>; + clocks = <&syscon_apbc CLK_UART9>, + <&syscon_apbc CLK_UART9_BUS>; + clock-names = "core", "bus"; interrupts = <51>; - clock-frequency = <14857000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; |