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| author | Stefano Radaelli <stefano.radaelli21@gmail.com> | 2025-10-03 15:50:29 +0300 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2025-10-30 16:43:26 +0300 |
| commit | 397dae3cecd7bfa8e77fa18edc38a69b9459811c (patch) | |
| tree | a600a665f35b9e30e9eee28d0d5a06f05d156fd2 | |
| parent | 6f41007cf80d94b689fe4d7e07535dcd427802e7 (diff) | |
| download | linux-397dae3cecd7bfa8e77fa18edc38a69b9459811c.tar.xz | |
arm64: dts: ti: var-som-am62p: Add support for ADS7846 touchscreen
The VAR-SOM-AM62P integrates an ADS7846 resistive touchscreen controller.
The controller is physically located on the SOM, and its signals are
routed to the SOM pins, allowing carrier boards to make use of it.
This patch adds the ADS7846 node under the appropriate SPI controller.
Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com>
Link: https://patch.msgid.link/20251003125031.30539-4-stefano.radaelli21@gmail.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi index aba72d0b767c..fc5a3942cde0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi @@ -322,6 +322,30 @@ pinctrl-0 = <&pinctrl_spi0>; ti,pindir-d0-out-d1-in; status = "okay"; + + /* Resistive touch controller */ + ads7846: touchscreen@0 { + compatible = "ti,ads7846"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_restouch>; + interrupt-parent = <&main_gpio0>; + interrupts = <48 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <1500000>; + pendown-gpio = <&main_gpio0 48 GPIO_ACTIVE_LOW>; + ti,x-min = /bits/ 16 <125>; + ti,x-max = /bits/ 16 <4008>; + ti,y-min = /bits/ 16 <282>; + ti,y-max = /bits/ 16 <3864>; + ti,x-plate-ohms = /bits/ 16 <180>; + ti,pressure-max = /bits/ 16 <255>; + ti,debounce-max = /bits/ 16 <10>; + ti,debounce-tol = /bits/ 16 <3>; + ti,debounce-rep = /bits/ 16 <1>; + ti,settle-delay-usec = /bits/ 16 <150>; + ti,keep-vref-on; + wakeup-source; + }; }; &main_uart5 { |