diff options
| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 11:46:42 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-03-06 05:01:47 +0300 |
| commit | 37c24ed660e4ddaa1a562c75b158128a5515571e (patch) | |
| tree | ad19251fe3315fe8a27e016e24e07cfa9ed3ee40 | |
| parent | 8940c105273fcde00a60023f68f8a5b75e1df0cc (diff) | |
| download | linux-37c24ed660e4ddaa1a562c75b158128a5515571e.tar.xz | |
ARM: dts: imx6ul-prti6g: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Without this patch we have relatively high amount of dropped packets.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6ul-prti6g.dts | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6ul-prti6g.dts b/arch/arm/boot/dts/imx6ul-prti6g.dts index c18390f238e1..b7c96fbe7a91 100644 --- a/arch/arm/boot/dts/imx6ul-prti6g.dts +++ b/arch/arm/boot/dts/imx6ul-prti6g.dts @@ -26,6 +26,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; + clock-output-names = "enet1_ref_pad"; }; leds { @@ -60,6 +61,13 @@ status = "okay"; }; +&clks { + clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&clock_ksz8081_out>; + clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "enet1_ref_pad"; + assigned-clocks = <&clks IMX6UL_CLK_ENET1_REF_SEL>; + assigned-clock-parents = <&clock_ksz8081_out>; +}; + &ecspi1 { cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; @@ -85,12 +93,6 @@ pinctrl-0 = <&pinctrl_eth1>; phy-mode = "rmii"; phy-handle = <&rmii_phy>; - clocks = <&clks IMX6UL_CLK_ENET>, - <&clks IMX6UL_CLK_ENET_AHB>, - <&clks IMX6UL_CLK_ENET_PTP>, - <&clock_ksz8081_out>; - clock-names = "ipg", "ahb", "ptp", - "enet_clk_ref"; status = "okay"; mdio { |