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| author | Lijo Lazar <lijo.lazar@amd.com> | 2025-11-25 14:06:08 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-08 22:19:45 +0300 |
| commit | 36b98a7229cd39d1e36edfbf3b2797b778e927a1 (patch) | |
| tree | 6f408632756216255fc7da03ff886c1f3a8d6576 | |
| parent | b4742a9e7fd42c011cf805e3441dd188f22e325c (diff) | |
| download | linux-36b98a7229cd39d1e36edfbf3b2797b778e927a1.tar.xz | |
drm/amd/pm: Add generic pcie dpm table
Add a generic pcie dpm table which contains the number of link clock
levels and link clock, pcie gen speed/width corresponding to each level.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index 3d67d948eaff..a4e8e488030f 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -314,6 +314,15 @@ struct smu_dpm_table { #define SMU_DPM_TABLE_MAX(table) \ ((table)->count > 0 ? (table)->dpm_levels[(table)->count - 1].value : 0) +#define SMU_MAX_PCIE_LEVELS 3 + +struct smu_pcie_table { + uint8_t pcie_gen[SMU_MAX_PCIE_LEVELS]; + uint8_t pcie_lane[SMU_MAX_PCIE_LEVELS]; + uint16_t lclk_freq[SMU_MAX_PCIE_LEVELS]; + uint32_t lclk_levels; +}; + struct smu_bios_boot_up_values { uint32_t revision; uint32_t gfxclk; |