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authorFrancesco Dolcini <francesco.dolcini@toradex.com>2025-12-23 19:28:29 +0300
committerShawn Guo <shawnguo@kernel.org>2025-12-30 16:15:34 +0300
commit3669332babd0038b714abd3e360be130fd401022 (patch)
tree354591dfaaf34f16223f8dce442b51dba073dcc2
parenteb2615ad4643c9e3fc6a3c9082084cec744402b9 (diff)
downloadlinux-3669332babd0038b714abd3e360be130fd401022.tar.xz
arm64: dts: freescale: Add NXP i.MX8QP SoC dtsi
Add support for NXP i.MX8QP SoC, this is pin to pin compatible variant of the i.MX8QM, with a slower GPU and one Cortex A72 core instead of two. Link: https://www.nxp.com/products/i.MX8 Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qp.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qp.dtsi b/arch/arm64/boot/dts/freescale/imx8qp.dtsi
new file mode 100644
index 000000000000..26af9c5a51c5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qp.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+#include "imx8qm.dtsi"
+
+/delete-node/ &A72_1;
+
+&cluster1 {
+ /delete-node/ core1;
+};
+
+&gpu_3d0 {
+ assigned-clock-rates = <625000000>, <625000000>;
+};
+
+&thermal_zones {
+ cpu1-thermal {
+ cooling-maps {
+ map0 {
+ cooling-device =
+ <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+};