diff options
| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2022-11-04 19:18:48 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2022-11-22 04:37:20 +0300 |
| commit | 362e8be2ec04a6aa04db7d2984b8558815a6b956 (patch) | |
| tree | 88c98681f114de53059aec08497dbd3e64824650 | |
| parent | 4b90b148e0e2cc3b5df1e0dd7bb8008463c7eeac (diff) | |
| download | linux-362e8be2ec04a6aa04db7d2984b8558815a6b956.tar.xz | |
ARM: dts: wpcm450: Add clock controller node
This declares the clock controller and the necessary 48 Mhz reference
clock in the WPCM450 device. Switching devices over to the clock
controller is intentionally done in a separate patch to give time for
the clock controller driver to land.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221104161850.2889894-5-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 0adf0a7a6a7f..2a0b9c5a75f3 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -37,6 +37,14 @@ #clock-cells = <0>; }; + refclk: clock-48mhz { + /* 48 MHz reference oscillator */ + compatible = "fixed-clock"; + clock-output-names = "ref"; + clock-frequency = <48000000>; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -49,6 +57,15 @@ reg = <0xb0000000 0x200>; }; + clk: clock-controller@b0000200 { + compatible = "nuvoton,wpcm450-clk"; + reg = <0xb0000200 0x100>; + clocks = <&refclk>; + clock-names = "ref"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + serial0: serial@b8000000 { compatible = "nuvoton,wpcm450-uart"; reg = <0xb8000000 0x20>; |