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| author | Alexander Stein <alexander.stein@ew.tq-group.com> | 2025-12-17 11:48:04 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-12-30 11:30:21 +0300 |
| commit | 30e6d444b8dc5ae1f5dee1f3cda3a49864cd10fb (patch) | |
| tree | 5c41c3017b0bbba366b4a74a13a62b581d002519 | |
| parent | 8adc841d43ebceabec996c9dcff6e82d3e585268 (diff) | |
| download | linux-30e6d444b8dc5ae1f5dee1f3cda3a49864cd10fb.tar.xz | |
arm64: dts: mb-smarc-2: Add PCIe support
TQMa8XxS on MB-SMARC-2 supports mPCIe on X44.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/tqma8xxs.dtsi | 14 |
2 files changed, 21 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi b/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi index 8bfe77113d64..050ae23c4dc1 100644 --- a/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi +++ b/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi @@ -126,6 +126,12 @@ status = "okay"; }; +&hsio_phy { + fsl,hsio-cfg = "pciea-x2-pcieb"; + fsl,refclk-pad-mode = "input"; + status = "okay"; +}; + &i2c0 { tlv320aic3x04: audio-codec@18 { compatible = "ti,tlv320aic32x4"; @@ -156,6 +162,10 @@ status = "okay"; }; +&pcieb { + status = "okay"; +}; + ®_sdvmmc { off-on-delay-us = <200000>; status = "okay"; diff --git a/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi b/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi index ebf20d5b5df9..bfc918f18d01 100644 --- a/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi +++ b/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi @@ -402,6 +402,14 @@ status = "okay"; }; +&pcieb { + phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcieb>; + reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; +}; + &sai1 { assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, @@ -646,9 +654,9 @@ }; pinctrl_pcieb: pcieagrp { - fsl,pins = <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000041>, - <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x06000041>, - <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000041>; + fsl,pins = <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000041>, + <IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B 0x06000041>, + <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000041>; }; pinctrl_pwm_mipi_lvds0: mipi-lvds0-pwmgrp { |