diff options
author | Arnd Bergmann <arnd@arndb.de> | 2015-12-16 02:57:08 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-16 02:57:08 +0300 |
commit | 3081dc9eff32519bc3298c6dba0b877675d4c1cd (patch) | |
tree | d4c1d2af14e09e96dd015fa9163df88106b11ddf | |
parent | 22ba14f41ca6b7f96fe3d4a8eb116358060595fd (diff) | |
parent | c5d431e8c511788556651b91debd7d77d4508f4b (diff) | |
download | linux-3081dc9eff32519bc3298c6dba0b877675d4c1cd.tar.xz |
Merge tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu into next/multiplatform
Merge "mvebu soc for 4.5 (part 1)" from Gregory CLEMENT:
- orion5x/mv78xx0 multiplatform conversion
- legacy dove PMU support conversion
* tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu:
ARM: dove: convert legacy dove to PMU support
soc: dove: add legacy support to PMU driver
ARM: orion5x: multiplatform support
ARM: orion5x: clean up mach/*.h headers
ARM: mv78xx0: multiplatform support
ARM: mv78xx0: clean up mach/*.h headers
ARM: orion: use SPARSE_IRQ everywhere
ARM: orion: always use MULTI_IRQ_HANDLER
ARM: orion: move watchdog setup to mach-orion5x
Conflicts:
arch/arm/Kconfig
arch/arm/mach-dove/include/mach/entry-macro.S
arch/arm/mach-orion5x/include/mach/entry-macro.S
67 files changed, 269 insertions, 461 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 70eb100b56e7..72c1df041ae8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -493,40 +493,16 @@ config ARCH_DOVE select CPU_PJ4 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER select MVEBU_MBUS select PINCTRL select PINCTRL_DOVE select PLAT_ORION_LEGACY + select SPARSE_IRQ + select PM_GENERIC_DOMAINS if PM help Support for the Marvell Dove SoC 88AP510 -config ARCH_MV78XX0 - bool "Marvell MV78xx0" - select ARCH_REQUIRE_GPIOLIB - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select MVEBU_MBUS - select PCI - select PLAT_ORION_LEGACY - help - Support for the following Marvell MV78xx0 series SoCs: - MV781x0, MV782x0. - -config ARCH_ORION5X - bool "Marvell Orion" - depends on MMU - select ARCH_REQUIRE_GPIOLIB - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select MVEBU_MBUS - select PCI - select PLAT_ORION_LEGACY - select MULTI_IRQ_HANDLER - help - Support for the following Marvell Orion 5x series SoCs: - Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), - Orion-2 (5281), Orion-1-90 (6183). - config ARCH_KS8695 bool "Micrel/Kendin KS8695" select ARCH_REQUIRE_GPIOLIB diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig index 85d10d2e3d66..fcdffa7d9d78 100644 --- a/arch/arm/configs/mv78xx0_defconfig +++ b/arch/arm/configs/mv78xx0_defconfig @@ -11,6 +11,9 @@ CONFIG_KPROBES=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V6 is not set +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_MV78XX0=y CONFIG_MACH_DB78X00_BP=y CONFIG_MACH_RD78X00_MASA=y diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig index 8099417a9466..6ddca8875cb5 100644 --- a/arch/arm/configs/orion5x_defconfig +++ b/arch/arm/configs/orion5x_defconfig @@ -13,6 +13,9 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y CONFIG_BSD_DISKLABEL=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V6 is not set +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_ORION5X=y CONFIG_ARCH_ORION5X_DT=y CONFIG_MACH_DB88F5281=y diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c index 0dc39cf30fdd..b9a7c33db29a 100644 --- a/arch/arm/mach-dove/cm-a510.c +++ b/arch/arm/mach-dove/cm-a510.c @@ -88,6 +88,7 @@ static void __init cm_a510_init(void) MACHINE_START(CM_A510, "Compulab CM-A510 Board") .atag_offset = 0x100, + .nr_irqs = DOVE_NR_IRQS, .init_machine = cm_a510_init, .map_io = dove_map_io, .init_early = dove_init_early, diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 0d1a89298ece..0cdaa3851d2e 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -16,6 +16,7 @@ #include <linux/platform_data/dma-mv_xor.h> #include <linux/platform_data/usb-ehci-orion.h> #include <linux/platform_device.h> +#include <linux/soc/dove/pmu.h> #include <asm/hardware/cache-tauros2.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -375,6 +376,47 @@ void __init dove_setup_cpu_wins(void) DOVE_SCRATCHPAD_SIZE); } +static struct resource orion_wdt_resource[] = { + DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), + DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), +}; + +static struct platform_device orion_wdt_device = { + .name = "orion_wdt", + .id = -1, + .num_resources = ARRAY_SIZE(orion_wdt_resource), + .resource = orion_wdt_resource, +}; + +static void __init __maybe_unused orion_wdt_init(void) +{ + platform_device_register(&orion_wdt_device); +} + +static const struct dove_pmu_domain_initdata pmu_domains[] __initconst = { + { + .pwr_mask = PMU_PWR_VPU_PWR_DWN_MASK, + .rst_mask = PMU_SW_RST_VIDEO_MASK, + .iso_mask = PMU_ISO_VIDEO_MASK, + .name = "vpu-domain", + }, { + .pwr_mask = PMU_PWR_GPU_PWR_DWN_MASK, + .rst_mask = PMU_SW_RST_GPU_MASK, + .iso_mask = PMU_ISO_GPU_MASK, + .name = "gpu-domain", + }, { + /* sentinel */ + }, +}; + +static const struct dove_pmu_initdata pmu_data __initconst = { + .pmc_base = DOVE_PMU_VIRT_BASE, + .pmu_base = DOVE_PMU_VIRT_BASE + 0x8000, + .irq = IRQ_DOVE_PMU, + .irq_domain_start = IRQ_DOVE_PMU_START, + .domains = pmu_domains, +}; + void __init dove_init(void) { pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n", @@ -389,6 +431,7 @@ void __init dove_init(void) dove_clk_init(); /* internal devices that every board has */ + dove_init_pmu_legacy(&pmu_data); dove_rtc_init(); dove_xor0_init(); dove_xor1_init(); diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c index 76e26f949c27..bcb678fd2415 100644 --- a/arch/arm/mach-dove/dove-db-setup.c +++ b/arch/arm/mach-dove/dove-db-setup.c @@ -94,6 +94,7 @@ static void __init dove_db_init(void) MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") .atag_offset = 0x100, + .nr_irqs = DOVE_NR_IRQS, .init_machine = dove_db_init, .map_io = dove_map_io, .init_early = dove_init_early, diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h index 0c4b35f4ee5b..00f45458b3ec 100644 --- a/arch/arm/mach-dove/include/mach/dove.h +++ b/arch/arm/mach-dove/include/mach/dove.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARCH_DOVE_H #define __ASM_ARCH_DOVE_H +#include <mach/irqs.h> + /* * Marvell Dove address maps. * diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S deleted file mode 100644 index df1d44bdc375..000000000000 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Dove platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #32 - ands \irqstat, \irqstat, \tmp - - @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #64 - andeqs \irqstat, \irqstat, \tmp - - @ find first active interrupt source - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h index 3f29e6bca058..8ff0fa8b4fcd 100644 --- a/arch/arm/mach-dove/include/mach/irqs.h +++ b/arch/arm/mach-dove/include/mach/irqs.h @@ -90,7 +90,7 @@ #define NR_PMU_IRQS 7 #define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5) -#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) +#define DOVE_NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) #endif diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h index b47f75038686..d22b9b174007 100644 --- a/arch/arm/mach-dove/include/mach/pm.h +++ b/arch/arm/mach-dove/include/mach/pm.h @@ -51,22 +51,14 @@ #define CLOCK_GATING_GIGA_PHY_MASK (1 << CLOCK_GATING_BIT_GIGA_PHY) #define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50) -#define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54) -static inline int pmu_to_irq(int pin) -{ - if (pin < NR_PMU_IRQS) - return pin + IRQ_DOVE_PMU_START; +#define PMU_SW_RST_VIDEO_MASK BIT(16) +#define PMU_SW_RST_GPU_MASK BIT(18) - return -EINVAL; -} +#define PMU_PWR_GPU_PWR_DWN_MASK BIT(2) +#define PMU_PWR_VPU_PWR_DWN_MASK BIT(3) -static inline int irq_to_pmu(int irq) -{ - if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS) - return irq - IRQ_DOVE_PMU_START; - - return -EINVAL; -} +#define PMU_ISO_VIDEO_MASK BIT(0) +#define PMU_ISO_GPU_MASK BIT(1) #endif diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index bfb3703357c5..d6627c1f7f30 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -7,87 +7,15 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ - -#include <linux/kernel.h> #include <linux/init.h> #include <linux/irq.h> -#include <linux/gpio.h> #include <linux/io.h> -#include <asm/mach/arch.h> +#include <asm/exception.h> #include <plat/irq.h> -#include <asm/mach/irq.h> -#include <mach/pm.h> #include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include "common.h" -static void pmu_irq_mask(struct irq_data *d) -{ - int pin = irq_to_pmu(d->irq); - u32 u; - - u = readl(PMU_INTERRUPT_MASK); - u &= ~(1 << (pin & 31)); - writel(u, PMU_INTERRUPT_MASK); -} - -static void pmu_irq_unmask(struct irq_data *d) -{ - int pin = irq_to_pmu(d->irq); - u32 u; - - u = readl(PMU_INTERRUPT_MASK); - u |= 1 << (pin & 31); - writel(u, PMU_INTERRUPT_MASK); -} - -static void pmu_irq_ack(struct irq_data *d) -{ - int pin = irq_to_pmu(d->irq); - u32 u; - - /* - * The PMU mask register is not RW0C: it is RW. This means that - * the bits take whatever value is written to them; if you write - * a '1', you will set the interrupt. - * - * Unfortunately this means there is NO race free way to clear - * these interrupts. - * - * So, let's structure the code so that the window is as small as - * possible. - */ - u = ~(1 << (pin & 31)); - u &= readl_relaxed(PMU_INTERRUPT_CAUSE); - writel_relaxed(u, PMU_INTERRUPT_CAUSE); -} - -static struct irq_chip pmu_irq_chip = { - .name = "pmu_irq", - .irq_mask = pmu_irq_mask, - .irq_unmask = pmu_irq_unmask, - .irq_ack = pmu_irq_ack, -}; - -static void pmu_irq_handler(struct irq_desc *desc) -{ - unsigned long cause = readl(PMU_INTERRUPT_CAUSE); - unsigned int irq; - - cause &= readl(PMU_INTERRUPT_MASK); - if (cause == 0) { - do_bad_IRQ(desc); - return; - } - - for (irq = 0; irq < NR_PMU_IRQS; irq++) { - if (!(cause & (1 << irq))) - continue; - irq = pmu_to_irq(irq); - generic_handle_irq(irq); - } -} - static int __initdata gpio0_irqs[4] = { IRQ_DOVE_GPIO_0_7, IRQ_DOVE_GPIO_8_15, @@ -109,14 +37,6 @@ static int __initdata gpio2_irqs[4] = { 0, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* - * Compiling with both non-DT and DT support enabled, will - * break asm irq handler used by non-DT boards. Therefore, - * we provide a C-style irq handler even for non-DT boards, - * if MULTI_IRQ_HANDLER is set. - */ - static void __iomem *dove_irq_base = IRQ_VIRT_BASE; static asmlinkage void @@ -139,18 +59,13 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs) return; } } -#endif void __init dove_init_irq(void) { - int i; - orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq(dove_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-71. @@ -163,17 +78,4 @@ void __init dove_init_irq(void) orion_gpio_init(NULL, 64, 8, DOVE_GPIO2_VIRT_BASE, 0, IRQ_DOVE_GPIO_START + 64, gpio2_irqs); - - /* - * Mask and clear PMU interrupts - */ - writel(0, PMU_INTERRUPT_MASK); - writel(0, PMU_INTERRUPT_CAUSE); - - for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq); - irq_set_status_flags(i, IRQ_LEVEL); - irq_clear_status_flags(i, IRQ_NOREQUEST); - } - irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); } diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig index f2d309d0619e..a32575fa3fba 100644 --- a/arch/arm/mach-mv78xx0/Kconfig +++ b/arch/arm/mach-mv78xx0/Kconfig @@ -1,6 +1,15 @@ -if ARCH_MV78XX0 +menuconfig ARCH_MV78XX0 + bool "Marvell MV78xx0" if ARCH_MULTI_V5 + select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY + help + Support for the following Marvell MV78xx0 series SoCs: + MV781x0, MV782x0. -menu "Marvell MV78xx0 Implementations" +if ARCH_MV78XX0 config MACH_DB78X00_BP bool "Marvell DB-78x00-BP Development Board" @@ -20,6 +29,4 @@ config MACH_TERASTATION_WXL Say 'Y' here if you want your kernel to support the Buffalo WXL Nas. -endmenu - endif diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile index 7cd04634d302..ddb3aa98a3c7 100644 --- a/arch/arm/mach-mv78xx0/Makefile +++ b/arch/arm/mach-mv78xx0/Makefile @@ -1,3 +1,5 @@ +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include + obj-y += common.o mpp.o irq.o pcie.o obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/bridge-regs.h index e20d6da234a6..2f54e1753d45 100644 --- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +++ b/arch/arm/mach-mv78xx0/bridge-regs.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h - * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. @@ -9,7 +7,7 @@ #ifndef __ASM_ARCH_BRIDGE_REGS_H #define __ASM_ARCH_BRIDGE_REGS_H -#include <mach/mv78xx0.h> +#include "mv78xx0.h" #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) #define L2_WRITETHROUGH 0x00020000 diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c index 1f2ef98b37c6..e112f2e7cc9a 100644 --- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c @@ -17,9 +17,9 @@ #include <linux/mv643xx_eth.h> #include <linux/ethtool.h> #include <linux/i2c.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" #include "mpp.h" @@ -146,6 +146,7 @@ subsys_initcall(wxl_pci_init); MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL") /* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = wxl_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early, diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index e6ac679bece9..a1a04df9c05c 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -18,13 +18,13 @@ #include <asm/hardware/cache-feroceon-l2.h> #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/mv78xx0.h> -#include <mach/bridge-regs.h> #include <linux/platform_data/usb-ehci-orion.h> #include <linux/platform_data/mtd-orion_nand.h> #include <plat/time.h> #include <plat/common.h> #include <plat/addr-map.h> +#include "mv78xx0.h" +#include "bridge-regs.h" #include "common.h" static int get_tclk(void); diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index 4e0f22b30bc8..cf16e08d4cf5 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -15,9 +15,9 @@ #include <linux/mv643xx_eth.h> #include <linux/ethtool.h> #include <linux/i2c.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" static struct mv643xx_eth_platform_data db78x00_ge00_data = { @@ -94,6 +94,7 @@ subsys_initcall(db78x00_pci_init); MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = db78x00_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early, diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S deleted file mode 100644 index 6b1f088e0597..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell MV78xx0 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no low interrupts set, check high interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] - mov \irqnr, #63 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no high interrupts set, check error interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF] - ldr \tmp, [\base, #IRQ_MASK_ERR_OFF] - mov \irqnr, #95 - ands \irqstat, \irqstat, \tmp - - @ find first active interrupt source -1001: clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h deleted file mode 100644 index 67cab0a08e07..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/hardware.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/hardware.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "mv78xx0.h" - -#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/uncompress.h b/arch/arm/mach-mv78xx0/include/mach/uncompress.h deleted file mode 100644 index 6a761c44a296..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/uncompress.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/uncompress.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/serial_reg.h> -#include <mach/mv78xx0.h> - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 32073444024b..788569e960e1 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -11,9 +11,10 @@ #include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> -#include <mach/bridge-regs.h> +#include <asm/exception.h> #include <plat/orion-gpio.h> #include <plat/irq.h> +#include "bridge-regs.h" #include "common.h" static int __initdata gpio0_irqs[4] = { @@ -23,12 +24,44 @@ static int __initdata gpio0_irqs[4] = { IRQ_MV78XX0_GPIO_24_31, }; +static void __iomem *mv78xx0_irq_base = IRQ_VIRT_BASE; + +static asmlinkage void +__exception_irq_entry mv78xx0_legacy_handle_irq(struct pt_regs *regs) +{ + u32 stat; + + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF); + if (stat) { + unsigned int hwirq = __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF); + if (stat) { + unsigned int hwirq = 32 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF); + if (stat) { + unsigned int hwirq = 64 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } +} + void __init mv78xx0_init_irq(void) { orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); orion_irq_init(64, IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF); + set_handle_irq(mv78xx0_legacy_handle_irq); + /* * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask * registers for core #1 are at an offset of 0x18 from those of diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/irqs.h index fa1d422196c2..67e0fe730a13 100644 --- a/arch/arm/mach-mv78xx0/include/mach/irqs.h +++ b/arch/arm/mach-mv78xx0/irqs.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-mv78xx0/include/mach/irqs.h - * * IRQ definitions for Marvell MV78xx0 SoCs * * This file is licensed under the terms of the GNU General Public @@ -88,7 +86,7 @@ #define IRQ_MV78XX0_GPIO_START 96 #define NR_GPIO_IRQS 32 -#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) +#define MV78XX0_NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) #endif diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c index df50342179e2..72843c02e95a 100644 --- a/arch/arm/mach-mv78xx0/mpp.c +++ b/arch/arm/mach-mv78xx0/mpp.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/io.h> #include <plat/mpp.h> -#include <mach/hardware.h> +#include "mv78xx0.h" #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/mv78xx0.h index 723748d8ba7d..2db1265ec121 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/mv78xx0.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-mv78xx0/include/mach/mv78xx0.h - * * Generic definitions for Marvell MV78xx0 SoC flavors: * MV781x0 and MV782x0. * @@ -12,6 +10,8 @@ #ifndef __ASM_ARCH_MV78XX0_H #define __ASM_ARCH_MV78XX0_H +#include "irqs.h" + /* * Marvell MV78xx0 address maps. * diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index 097ea4cb1136..13a7d72ee0c4 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -15,7 +15,7 @@ #include <asm/irq.h> #include <asm/mach/pci.h> #include <plat/pcie.h> -#include <mach/mv78xx0.h> +#include "mv78xx0.h" #include "common.h" #define MV78XX0_MBUS_PCIE_MEM_TARGET(port, lane) ((port) ? 8 : 4) diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c index d2d06f3957f3..308ab71ec822 100644 --- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c @@ -14,9 +14,9 @@ #include <linux/ata_platform.h> #include <linux/mv643xx_eth.h> #include <linux/ethtool.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = { @@ -79,6 +79,7 @@ subsys_initcall(rd78x00_pci_init); MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = rd78x00_masa_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early, diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 66f1c952c048..a9ad95f000a1 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -1,6 +1,18 @@ -if ARCH_ORION5X +menuconfig ARCH_ORION5X + bool "Marvell Orion" + depends on MMU && ARCH_MULTI_V5 + select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON + select GENERIC_CLOCKEVENTS + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY + help + Support for the following Marvell Orion 5x series SoCs: + Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), + Orion-2 (5281), Orion-1-90 (6183). -menu "Orion Implementations" +if ARCH_ORION5X config ARCH_ORION5X_DT bool "Marvell Orion5x Flattened Device Tree" @@ -163,6 +175,4 @@ config MACH_RD88F6183AP_GE Say 'Y' here if you want your kernel to support the Marvell Orion-1-90 (88F6183) AP GE RD. -endmenu - endif diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile index a1e0fbe6a7a1..4b2502b4ca0d 100644 --- a/arch/arm/mach-orion5x/Makefile +++ b/arch/arm/mach-orion5x/Makefile @@ -1,3 +1,5 @@ +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include + obj-y += common.o pci.o irq.o mpp.o obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c index 8a7284124153..a89376a5cd92 100644 --- a/arch/arm/mach-orion5x/board-d2net.c +++ b/arch/arm/mach-orion5x/board-d2net.c @@ -20,9 +20,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * LaCie d2 Network Info diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c index d0871786dd8a..6f4c2c4ae2a5 100644 --- a/arch/arm/mach-orion5x/board-dt.c +++ b/arch/arm/mach-orion5x/board-dt.c @@ -20,10 +20,10 @@ #include <asm/system_misc.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/orion5x.h> -#include <mach/bridge-regs.h> #include <plat/irq.h> #include <plat/time.h> +#include "orion5x.h" +#include "bridge-regs.h" #include "common.h" static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = { diff --git a/arch/arm/mach-orion5x/board-mss2.c b/arch/arm/mach-orion5x/board-mss2.c index 66f9c3ba86cc..79202fd626df 100644 --- a/arch/arm/mach-orion5x/board-mss2.c +++ b/arch/arm/mach-orion5x/board-mss2.c @@ -17,8 +17,8 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> -#include <mach/bridge-regs.h> +#include "orion5x.h" +#include "bridge-regs.h" #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/board-rd88f5182.c b/arch/arm/mach-orion5x/board-rd88f5182.c index 270824b0e50f..b7b0f52f4c0a 100644 --- a/arch/arm/mach-orion5x/board-rd88f5182.c +++ b/arch/arm/mach-orion5x/board-rd88f5182.c @@ -18,8 +18,8 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5182 Info diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/bridge-regs.h index 5766e3fbff69..305598eaaee1 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/bridge-regs.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-orion5x/include/mach/bridge-regs.h - * * Orion CPU Bridge Registers * * This file is licensed under the terms of the GNU General Public @@ -11,7 +9,7 @@ #ifndef __ASM_ARCH_BRIDGE_REGS_H #define __ASM_ARCH_BRIDGE_REGS_H -#include <mach/orion5x.h> +#include "orion5x.h" #define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 6bbb7b55c6d1..70c3366c8d03 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -27,14 +27,14 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/bridge-regs.h> -#include <mach/hardware.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include <linux/platform_data/usb-ehci-orion.h> #include <plat/time.h> #include <plat/common.h> + +#include "bridge-regs.h" #include "common.h" +#include "orion5x.h" /***************************************************************************** * I/O Address Mapping @@ -184,9 +184,21 @@ static void __init orion5x_crypto_init(void) /***************************************************************************** * Watchdog ****************************************************************************/ +static struct resource orion_wdt_resource[] = { + DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), + DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), +}; + +static struct platform_device orion_wdt_device = { + .name = "orion_wdt", + .id = -1, + .num_resources = ARRAY_SIZE(orion_wdt_resource), + .resource = orion_wdt_resource, +}; + static void __init orion5x_wdt_init(void) { - orion_wdt_init(); + platform_device_register(&orion_wdt_device); } diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index dc01c4ffc9a8..12f74b46e2ff 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -23,10 +23,10 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * DB-88F5281 on board devices @@ -369,6 +369,7 @@ static void __init db88f5281_init(void) MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = db88f5281_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index bc279a853075..cd483bfb5ca8 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -33,8 +33,8 @@ #include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <asm/system_info.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> +#include "orion5x.h" #include "common.h" #include "mpp.h" @@ -666,6 +666,7 @@ static void __init dns323_init(void) MACHINE_START(DNS323, "D-Link DNS-323") /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = dns323_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S deleted file mode 100644 index 73919a36b577..000000000000 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Orion platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =MAIN_IRQ_CAUSE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] @ main cause - ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask - mov \irqnr, #0 @ default irqnr - @ find cause bits that are unmasked - ands \irqstat, \irqstat, \tmp @ clear Z flag if any - clzne \irqnr, \irqstat @ calc irqnr - rsbne \irqnr, \irqnr, #32 - .endm diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h deleted file mode 100644 index 395735482473..000000000000 --- a/arch/arm/mach-orion5x/include/mach/hardware.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/hardware.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "orion5x.h" - -#endif diff --git a/arch/arm/mach-orion5x/include/mach/uncompress.h b/arch/arm/mach-orion5x/include/mach/uncompress.h deleted file mode 100644 index abd26b542c3c..000000000000 --- a/arch/arm/mach-orion5x/include/mach/uncompress.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/uncompress.h - * - * Tzachi Perelstein <tzachi@marvell.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/serial_reg.h> -#include <mach/orion5x.h> - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 086ecb87d885..de980ef9cda1 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -13,10 +13,10 @@ #include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> -#include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include <plat/irq.h> #include <asm/exception.h> +#include "bridge-regs.h" #include "common.h" static int __initdata gpio0_irqs[4] = { @@ -26,14 +26,6 @@ static int __initdata gpio0_irqs[4] = { IRQ_ORION5X_GPIO_24_31, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* - * Compiling with both non-DT and DT support enabled, will - * break asm irq handler used by non-DT boards. Therefore, - * we provide a C-style irq handler even for non-DT boards, - * if MULTI_IRQ_HANDLER is set. - */ - asmlinkage void __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) { @@ -47,15 +39,12 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) return; } } -#endif void __init orion5x_init_irq(void) { orion_irq_init(1, MAIN_IRQ_MASK); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq(orion5x_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-31. diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/irqs.h index 2431d9923427..506c8e0b30c4 100644 --- a/arch/arm/mach-orion5x/include/mach/irqs.h +++ b/arch/arm/mach-orion5x/irqs.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-orion5x/include/mach/irqs.h - * * IRQ definitions for Orion SoC * * Maintainer: Tzachi Perelstein <tzachi@marvell.com> @@ -54,7 +52,7 @@ #define IRQ_ORION5X_GPIO_START 33 #define NR_GPIO_IRQS 32 -#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) +#define ORION5X_NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) #endif diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index fe6a48a325e8..9dc3f59bed9c 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -23,10 +23,10 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * KUROBOX-PRO Info @@ -383,6 +383,7 @@ static void __init kurobox_pro_init(void) MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, @@ -397,6 +398,7 @@ MACHINE_END MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c index 028ea038d404..dfdaa8a498a4 100644 --- a/arch/arm/mach-orion5x/ls-chl-setup.c +++ b/arch/arm/mach-orion5x/ls-chl-setup.c @@ -22,9 +22,9 @@ #include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Linkstation LS-CHL Info @@ -320,6 +320,7 @@ static void __init lschl_init(void) MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") /* Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = lschl_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c index 32b7129b767d..47ba6e0502f5 100644 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ b/arch/arm/mach-orion5x/ls_hgl-setup.c @@ -21,9 +21,9 @@ #include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Linkstation LS-HGL Info @@ -267,6 +267,7 @@ static void __init ls_hgl_init(void) MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = ls_hgl_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index 5b70026f478c..19ef18594415 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -11,8 +11,8 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> -#include <mach/hardware.h> #include <plat/mpp.h> +#include "orion5x.h" #include "mpp.h" #include "common.h" diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index e032f01da49e..2bf8ec75e908 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -21,9 +21,9 @@ #include <linux/ata_platform.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #define MV2120_NOR_BOOT_BASE 0xf4000000 #define MV2120_NOR_BOOT_SIZE SZ_512K @@ -232,6 +232,7 @@ static void __init mv2120_init(void) MACHINE_START(MV2120, "HP Media Vault mv2120") /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = mv2120_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index ba73dc7ffb9e..bf6be4cfd238 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c @@ -24,10 +24,10 @@ #include <linux/delay.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * LaCie 2Big Network Info @@ -423,6 +423,7 @@ static void __init net2big_init(void) /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ MACHINE_START(NET2BIG, "LaCie 2Big Network") .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = net2big_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/orion5x.h index b78ff3248868..3364df331f01 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/orion5x.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-orion5x/include/mach/orion5x.h - * * Generic definitions of Orion SoC flavors: * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. * @@ -14,6 +12,8 @@ #ifndef __ASM_ARCH_ORION5X_H #define __ASM_ARCH_ORION5X_H +#include "irqs.h" + /***************************************************************************** * Orion Address Maps * diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index b02f3947be51..ecb998e7f8dc 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -19,8 +19,8 @@ #include <asm/mach/pci.h> #include <plat/pcie.h> #include <plat/addr-map.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * Orion has one PCIe controller and one PCI controller. diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index 213b3e143c57..c742e7b40b0d 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -20,9 +20,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5181L FXO Info @@ -169,6 +169,7 @@ subsys_initcall(rd88f5181l_fxo_pci_init); MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") /* Maintainer: Nicolas Pitre <nico@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5181l_fxo_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index 594800e1d691..7e977b794b0c 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -21,9 +21,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5181L GE Info @@ -181,6 +181,7 @@ subsys_initcall(rd88f5181l_ge_pci_init); MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5181l_ge_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index b576ef5f18a1..fe3e67c81fb8 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -23,9 +23,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5182 Info @@ -281,6 +281,7 @@ static void __init rd88f5182_init(void) MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5182_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 78a1e6ab1b9d..4bf80dd5478c 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -22,8 +22,8 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { .phy_addr = -1, @@ -119,6 +119,7 @@ subsys_initcall(rd88f6183ap_ge_pci_init); MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f6183ap_ge_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 12086745c9fd..deb5e29ac669 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -22,9 +22,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Terastation Pro 2/Live Info @@ -359,6 +359,7 @@ static void __init tsp2_init(void) MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = tsp2_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index c725b7cb9875..7bd671b2854c 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -25,9 +25,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "tsx09-common.h" #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 @@ -324,6 +324,7 @@ static void __init qnap_ts209_init(void) MACHINE_START(TS209, "QNAP TS-109/TS-209") /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = qnap_ts209_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index cf2ab531cabc..a77613b14db5 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -27,9 +27,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "tsx09-common.h" /***************************************************************************** @@ -313,6 +313,7 @@ static void __init qnap_ts409_init(void) MACHINE_START(TS409, "QNAP TS-409") /* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = qnap_ts409_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 1b704d35cf5b..b67ace446576 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -23,9 +23,9 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "ts78xx-fpga.h" /***************************************************************************** @@ -615,6 +615,7 @@ static void __init ts78xx_init(void) MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") /* Maintainer: Alexander Clouter <alex@digriz.org.uk> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = ts78xx_init, .map_io = ts78xx_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c index d42e006597c7..89774985d380 100644 --- a/arch/arm/mach-orion5x/tsx09-common.c +++ b/arch/arm/mach-orion5x/tsx09-common.c @@ -15,7 +15,7 @@ #include <linux/mv643xx_eth.h> #include <linux/timex.h> #include <linux/serial_reg.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "tsx09-common.h" #include "common.h" diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 80a56ee245b3..4e1e5c8f6111 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -19,7 +19,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "common.h" #include "mpp.h" @@ -174,6 +174,7 @@ subsys_initcall(wnr854t_pci_init); MACHINE_START(WNR854T, "Netgear WNR854T") /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = wnr854t_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index 670e30dc0d1b..61e9027ef224 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -22,7 +22,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "common.h" #include "mpp.h" @@ -262,6 +262,7 @@ subsys_initcall(wrt350n_v2_pci_init); MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = wrt350n_v2_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early, diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 8861c367d061..78c8bf4043c0 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c @@ -21,7 +21,6 @@ #include <net/dsa.h> #include <linux/platform_data/dma-mv_xor.h> #include <linux/platform_data/usb-ehci-orion.h> -#include <mach/bridge-regs.h> #include <plat/common.h> /* Create a clkdev entry for a given device/clk */ @@ -589,26 +588,6 @@ void __init orion_spi_1_init(unsigned long mapbase) } /***************************************************************************** - * Watchdog - ****************************************************************************/ -static struct resource orion_wdt_resource[] = { - DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), - DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), -}; - -static struct platform_device orion_wdt_device = { - .name = "orion_wdt", - .id = -1, - .num_resources = ARRAY_SIZE(orion_wdt_resource), - .resource = orion_wdt_resource, -}; - -void __init orion_wdt_init(void) -{ - platform_device_register(&orion_wdt_device); -} - -/***************************************************************************** * XOR ****************************************************************************/ static u64 orion_xor_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index d9a24f605a2b..9e6d76ad48a9 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h @@ -75,8 +75,6 @@ void __init orion_spi_init(unsigned long mapbase); void __init orion_spi_1_init(unsigned long mapbase); -void __init orion_wdt_init(void); - void __init orion_xor0_init(unsigned long mapbase_low, unsigned long mapbase_high, unsigned long irq_0, diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index 8c1fc06007c0..5b63b28b00ac 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -18,7 +18,6 @@ #include <asm/exception.h> #include <plat/irq.h> #include <plat/orion-gpio.h> -#include <mach/bridge-regs.h> void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) { diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index 7310bcfb299f..5b4ff9373c89 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c @@ -13,7 +13,6 @@ #include <linux/mbus.h> #include <linux/io.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <plat/orion-gpio.h> #include <plat/mpp.h> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index f2ba2e932ae1..d52872680f86 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/ +obj-$(CONFIG_ARCH_DOVE) += dove/ obj-$(CONFIG_MACH_DOVE) += dove/ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ obj-$(CONFIG_ARCH_QCOM) += qcom/ diff --git a/drivers/soc/dove/pmu.c b/drivers/soc/dove/pmu.c index abd087917f80..039374e9fdc0 100644 --- a/drivers/soc/dove/pmu.c +++ b/drivers/soc/dove/pmu.c @@ -305,6 +305,49 @@ static int __init dove_init_pmu_irq(struct pmu_data *pmu, int irq) return 0; } +int __init dove_init_pmu_legacy(const struct dove_pmu_initdata *initdata) +{ + const struct dove_pmu_domain_initdata *domain_initdata; + struct pmu_data *pmu; + int ret; + + pmu = kzalloc(sizeof(*pmu), GFP_KERNEL); + if (!pmu) + return -ENOMEM; + + spin_lock_init(&pmu->lock); + pmu->pmc_base = initdata->pmc_base; + pmu->pmu_base = initdata->pmu_base; + + pmu_reset_init(pmu); + for (domain_initdata = initdata->domains; domain_initdata->name; + domain_initdata++) { + struct pmu_domain *domain; + + domain = kzalloc(sizeof(*domain), GFP_KERNEL); + if (domain) { + domain->pmu = pmu; + domain->pwr_mask = domain_initdata->pwr_mask; + domain->rst_mask = domain_initdata->rst_mask; + domain->iso_mask = domain_initdata->iso_mask; + domain->base.name = domain_initdata->name; + + __pmu_domain_register(domain, NULL); + } + } + + ret = dove_init_pmu_irq(pmu, initdata->irq); + if (ret) + pr_err("dove_init_pmu_irq() failed: %d\n", ret); + + if (pmu->irq_domain) + irq_domain_associate_many(pmu->irq_domain, + initdata->irq_domain_start, + 0, NR_PMU_IRQS); + + return 0; +} + /* * pmu: power-manager@d0000 { * compatible = "marvell,dove-pmu"; diff --git a/include/linux/soc/dove/pmu.h b/include/linux/soc/dove/pmu.h index 9c99f84bcc0e..765386972b55 100644 --- a/include/linux/soc/dove/pmu.h +++ b/include/linux/soc/dove/pmu.h @@ -1,6 +1,25 @@ #ifndef LINUX_SOC_DOVE_PMU_H #define LINUX_SOC_DOVE_PMU_H +#include <linux/types.h> + +struct dove_pmu_domain_initdata { + u32 pwr_mask; + u32 rst_mask; + u32 iso_mask; + const char *name; +}; + +struct dove_pmu_initdata { + void __iomem *pmc_base; + void __iomem *pmu_base; + int irq; + int irq_domain_start; + const struct dove_pmu_domain_initdata *domains; +}; + +int dove_init_pmu_legacy(const struct dove_pmu_initdata *); + int dove_init_pmu(void); #endif |